HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 276

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 Interrupt Controller (INTC)
10.3.3
ICR1 is a 16-bit register that specifies the detection mode for external interrupt input pins IRQ5 to
IRQ0 individually: rising edge, falling edge, high level, or low level. This register is initialized to
H'4000 by a power-on reset or manual reset, but is not initialized in standby mode.
Note: *
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REJ09B0023-0400
Bit
15
14
13, 12
11
10
9
8
7
6
5
4
3
2
1
0
Interrupt Control Register 1 (ICR1)
The IRQE bit must be cleared to 0 in the initialization routine after a reset, and must then
not be changed.
Bit Name

IRQE*

IRQ51S
IRQ50S
IRQ41S
IRQ40S
IRQ31S
IRQ30S
IRQ21S
IRQ20S
IRQ11S
IRQ10S
IRQ01S
IRQ00S
Initial
Value
0
1
All 0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Interrupt Request Enable
Enables or disables the use of pins IRQ7 to IRQ0 as
eight independent interrupt pins.
0: Use of pins IRQ7 to IRQ0 as eight independent
1: Use of pins IRQ7 to IRQ0 as interrupt pins disabled
Reserved
These bits are always read as 0. The write value should
always be 0.
IRQn Sense Select
These bits select whether interrupt request signals
corresponding to pins IRQ5 to IRQ0 are detected by a
rising edge, falling edge, high level, or low level.
Bit 2n+1 Bit 2n
IRQn1S IRQn0S
0
0
1
1
n = 0 to 5
interrupt pins enabled*
1
0
1
0
: Interrupt request is detected on falling
: Interrupt request is detected on rising
: Interrupt request is detected on low
: Interrupt request is detected on high
edge of IRQn input
edge of IRQn input
level of IRQn input
level of IRQn input