HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 344

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 12 Bus State Controller (BSC)
• CS5BWCR
Rev. 4.00 Sep. 14, 2005 Page 294 of 982
REJ09B0023-0400
Bit
5 to 2
1
0
Bit
31 to 22
21
Bit Name

SZSEI
Bit Name

HW1
HW0
Initial
Value
All 0
0
0
Initial
Value
All 0
0
R/W
R
R/W
R/W
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
MPX-IO Interface Bus Width Specification
Specifies an address to select the bus width when the
BSZ[1:0] of CS5BBCR are specified as 11. This bit is
valid only when area 5B is specified as MPX-I/O.
0: Selects the bus width by address A14
1: Selects the bus width by address A21
The relationship between the SZSEL bit and bus width
selected by A14 or A21 are summarized below.
SZSEL A14
0
0
1
1
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Delay Cycles from RD, WEn Negation to Address,
CSn Negation
Specify the number of delay cycles from RD and WEn
negation to address and CSn negation.
00: 0.5 cycles
01: 1.5 cycles
10: 2.5 cycles
11: 3.5 cycles
0
0
Not affected
Not affected
A21
Not affected
Not affected
Bus Width
0
1
8 bits
16 bits
8 bits
16 bits