HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 70

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 1 Overview
Rev. 4.00 Sep. 14, 2005 Page 20 of 828
REJ09B0023-0400
Classification
Bus control
RD/WR
Symbol
BS
WE3/DQMUU/
AH
WE2/DQMUL
WE1/DQMLU
WE0/DQMLL
RASU, RASL
CASU, CASL
CKE
FRAME
WAIT
I/O
O
O
O
O
O
O
O
O
O
O
I
Name
Read/write
Bus start
Byte specification Indicates that bits 31 to 24 of the
Byte specification Indicates that bits 23 to 16 of the
Byte specification Indicates that bits 15 to 8 of the data
Byte specification Indicates that bits 7 to 0 of the data
RAS
CAS
CK enable
FRAME signal
Wait
Function
Read/write signal
Bus-cycle start
data in the external memory or
device are being written.
Selects D31 to D24 when SDRAM is
connected.
Address hold signal for address/data
multiplexed I/O.
data in the external memory or
device are being written.
Selects D23 to D16 when SDRAM is
connected.
in the external memory or device are
being written.
Selects D15 to D8 when SDRAM is
connected.
in the external memory or device are
being written.
Selects D7 to D0 when SDRAM is
connected.
Connected to the RAS pin when the
SDRAM is connected.
Connected to the CAS pin when the
SDRAM is connected.
Connected to the CKE pin when the
SDRAM is connected.
Connects the FRAME signal for the
burst MPX-IO interface.
When active, inserts a wait cycle into
the bus cycles during access to the
external space.