HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 256

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 Exception Handling
Table 9.2
9.3.2
CPU address error:
• Conditions
• Types
• Save address
• Exception code
• Remarks
Rev. 4.00 Sep. 14, 2005 Page 206 of 982
REJ09B0023-0400
Type
Power-on reset
Manual reset
H-UDI reset
 Instruction is fetched from odd address (4n + 1, 4n + 3)
 Word data is accessed from addresses other than word boundaries (4n + 1, 4n + 3)
 Long word is accessed from addresses other than longword boundaries (4n + 1, 4n + 2,
 The area ranging from H'80000000 to H'FFFFFFFF in logical space is accessed in user
Instruction synchronous, re-execution type
Instruction fetch: An instruction address to be fetched when an exception occurred
Data access: An instruction address where an exception occurs (a delayed branch instruction
address if an instruction is assigned to a delay slot)
An exception occurred during read: H'0E0
An exception occurred during write: H'1E0
None
4n + 3)
mode
General Exceptions
Type of Reset
Condition to reset
RESETP = Low level
RESETM = Low level
H-UDI reset command entry
CPU
Initialization
On-chip peripheral module
Refer to the register
configurations in the relevant
sections.
Internal state