HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 99

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Addressing
Mode
Register
indirect with
displacement
Indexed
register indirect
GBR
indirect with
displacement
Indexed GBR
indirect
Instruction
Format
@(disp:4, Rn)
@(R0, Rn)
@(disp:8, GBR) Effective address is register GBR contents
@(R0, GBR)
Effective Address Calculation Method
Effective address is register Rn contents with
4-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte),
2 (word), or 4 (longword), according to the
operand size.
Effective address is sum of register Rn and
R0 contents.
with 8-bit displacement disp added.
After disp is zero-extended, it is multiplied by
1 (byte), 2 (word), or 4 (longword), according
to the operand size.
Effective address is sum of register GBR and
R0 contents.
(zero-extended)
(zero-extended)
GBR
1/2/4
Rn
R0
R0
GBR
1/2/4
disp
disp
Rn
×
×
+
+
+
+
GBR + R0
+ disp × 1/2/4
+ disp × 1/2/4
Rn + R0
GBR
Rn
Rev. 4.00 Sep. 14, 2005 Page 49 of 982
Calculation Formula
Byte: Rn + disp
Word: Rn + disp × 2
Longword: Rn + disp × 4
Rn + R0
Byte: GBR + disp
Word: GBR + disp × 2
Longword: GBR + disp × 4
GBR + R0
REJ09B0023-0400
Section 2 CPU