HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 913

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

23.9.2
PJDR is a 13-bit readable/writable register with three reserved bits that stores data for pins PTJ12
to PTJ0. The PJDR is initialized to H'0000 by a power-on reset, but it retains its previous value by
a manual reset, in standby mode, or in sleep mode.
Table 23.12 Port J Data Register (PJDR) Read/Write Operations
(n = 0 to 12)
Bit
15 to 13
12
11
10
9
8
7
6
5
4
3
2
1
0
PJnMD2 PJnMD1 Pin State
0
1
Port J Data Register (PJDR)
Bit Name

PJ12DT
PJ11DT
PJ10DT
PJ9DT
PJ8DT
PJ7DT
PJ6DT
PJ5DT
PJ4DT
PJ3DT
PJ2DT
PJ1DT
PJ0DT
0
1
0
1
Input
Output
Reserved
Other functions
Initial
Value
All 0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read
PJDR value Data is written to PJDR and the value is
Pin state

Pin state
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Bits PJ12DT to PJ0DT correspond to pins PTJ12 to
PTJ0. When the pin function is general output port, the
value of the corresponding bit in PJDR is returned
directly by reading the port. When the function is
general input port, the corresponding pin level is read
by reading the port. Table 23.12 shows the function of
PJDR.
Write
Data is written to PJDR, but does not affect
pin state.
output from the pin.

Data is written to PJDR, but does not affect
pin state.
Rev. 4.00 Sep. 14, 2005 Page 863 of 982
Section 23 I/O Ports
REJ09B0023-0400