HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 802

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 20 USB Function Module
20.3.3
Together with USB interrupt flag registers 0 (USBIFR0) and 1 (USBIFR1), USBIFR2 indicates
interrupt status information required by the application. When an interrupt occurs, the
corresponding bit is set to 1 and an interrupt request is sent to the CPU according to the
combination with USB interrupt enable register 2 (USBIER2). Clearing is performed by writing 0
to the bit to be cleared, and 1 to the other bits. However, CFGV is a status bit, and cannot be
cleared. USBIFR2 is initialized to H'20 by a power-on reset.
Rev. 4.00 Sep. 14, 2005 Page 752 of 982
REJ09B0023-0400
Bit
2
1
0
Bit
7
6
5
4
3
2
USB Interrupt Flag Register 2 (USBIFR2)
Bit Name
EP3TR
EP3TS
VBUS
Bit Name




AWAKE
SUSPS
Initial
Value
0
0
0
Initial
Value
0
0
1
0
0
0
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
The write value should always be 0.
Awake Signal Detection
This bit is set to 1 when the resume or bus reset signal
is detected on the USB bus in the suspend state with
USBCTRL/SUSPEND = 1.
USB Suspend Signal Detection
This bit is set to 1 when the USB suspend signal is
detected with USBCTRL/SUSPEND = 1.
Description
EP3 Transfer Request
This bit is set if there is no valid transmit data in the
FIFO buffer when an IN token for endpoint 3 is
received from the host. A NACK handshake is
returned to the host until data is written to the FIFO
buffer and packet transmission is enabled.
EP3 Transmit Complete
This bit is set when data is transmitted to the host
from endpoint 3 and an ACK handshake is returned.
UBS Disconnection Detection
This bit is set to 1 when a function is connected to or
disconnected from the USB bus. Use the VBUSCNT
pin of this module to detect connection/disconnection.