HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 191

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Single-Data Transfer Instructions (MOVS.W and MOVS.L): This LSI has single load/store
instructions for the DSP registers. It is similar to a load/store instruction for a system register. It
transfers data between memory and DSP data registers using LAB and LDB buses. There may be
access conflict between data access and instruction fetch.
The single-data transfer instruction has word and longword access modes. Figure 3.23 shows a
block diagram of single-data transfer. The existing CPU core's hardware resource is used for
control of the memory address buffer (MAB) and memory selection.
LAB
LDB
31
32-bit
32-bit
Memory
R2 [As]
R3 [As]
R4 [As]
R5 [As]
31
Figure 3.23 Load/Store Control for Single-Data Transfer Instruction
MAB
0
0
Control
in CPU
Instruction code for single data transfer
operation
Control
As
Rev. 4.00 Sep. 14, 2005 Page 141 of 982
Ms
WL LS
Section 3 DSP Operation
Input/output control for
DSP data registers
REJ09B0023-0400
Ds