HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 683

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

18.7.9
If an input capture signal is generated in the T2 state of a TGR write cycle, the input capture
operation takes precedence and the write to TGR is not performed.
Figure 18.77 shows the timing in this case.
Pφ
Address
Write signal
Input capture
signal
TCNT
TGR
Conflict between TGR Write and Input Capture
Figure 18.77 Conflict between TGR Write and Input Capture
TGR write cycle
T1
TGR address
Section 18 Multi-Function Timer Pulse Unit (MTU)
M
T2
Rev. 4.00 Sep. 14, 2005 Page 633 of 982
M
REJ09B0023-0400