HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 269

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HD6417641

Manufacturer Part Number
HD6417641
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
The interrupt controller (INTC) ascertains the priority of interrupt sources and controls interrupt
requests to the CPU. The INTC registers set the order of priority of each interrupt, allowing the
user to process interrupt requests according to the user-set priority.
10.1
The INTC has the following features:
• 16 levels of interrupt priority can be set
• NMI noise canceler function
• IRQ interrupts can be set
• Interrupts can be enabled or disabled
By setting the ten interrupt-priority registers, the priorities of on-chip peripheral modules, and
IRQ interrupts can be selected from 16 levels for individual request sources.
An NMI input-level bit indicates the NMI pin state. By reading this bit in the interrupt
exception service routine, the pin state can be checked, enabling it to be used as a noise
canceler.
Detection of low level, rising edge, falling edge, or high level
Interrupts can be enabled or disabled individually for each interrupt source with the interrupt
mask registers (IMR) and interrupt mask clear registers (IMCR).
Features
Section 10 Interrupt Controller (INTC)
Rev. 4.00 Sep. 14, 2005 Page 219 of 982
Section 10 Interrupt Controller (INTC)
REJ09B0023-0400

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