HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 210

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 5 Watchdog Timer (WDT)
5. When the WDT count overflows, the CPG starts supplying the clock and the processor
6. Since the WDT continues counting from H'00, set the STBY bit in the STBCR register to 0 in
5.3.2
To change the frequency used by the PLL, use the WDT. When changing the frequency only by
switching the divider, do not use the WDT.
1. Before changing the frequency, always clear the TME bit in WTCSR to 0. When the TME bit
2. Set the type of count clock used in the CKS2 to CKS0 bits of WTCSR and the initial values for
3. When the frequency control register (FRQCR) is written, the processor stops temporarily. The
4. When the WDT count overflows, the CPG resumes supplying the clock and the processor
5. The counter stops at the values H'00.
6. Before changing the WTCNT after the execution of the frequency change instruction, always
5.3.3
1. Set the WT/IT bit in the WTCSR to 1, set the reset type in the RSTS bit, set the type of count
2. Set the TME bit in WTCSR to 1 to start the count in watchdog timer mode.
3. While operating in watchdog timer mode, rewrite the counter periodically to H'00 to prevent
4. When the counter overflows, the WDT sets the WOVF flag in WTCSR to 1 and generates the
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resumes operation. The WOVF flag in WTCSR is not set when this happens.
the interrupt processing program and this will stop the WDT. When the STBY bit remains 1,
the LSI again enters the standby mode when the WDT has counted up to H'80. This standby
mode can be canceled by power-on resets.
is 1, an erroneous reset or interval timer interrupt may be generated when the count overflows.
the counter in the WTCNT counter. These values should ensure that the time till count
overflow is longer than the clock oscillation settling time.
WDT starts counting.
resumes operation. The WOVF in WTCSR is not set when this happens.
confirm that the value of the WTCNT is H'00 by reading the WTCNT.
clock in the CKS2 to CKS0 bits, and set the initial value of the counter in the WTCNT.
the counter from overflowing.
type of reset specified by the RSTS bit. The counter then resumes counting.
Changing the Frequency
Using Watchdog Timer Mode