HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 851

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HD6417641

Manufacturer Part Number
HD6417641
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Table 21.2 Analog Input Channels and A/D Data Registers
21.2.2
ADCSR is a 16-bit readable/writable register that selects the mode, controls the A/D converter,
and enable or disable starting of A/D conversion by external trigger input.
ADCSR is initialized to H'0040 by a power-on reset and in standby mode.
Analog Input Channel
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Bit
15
A/D Control/Status Registers (ADCSR0, ADCSR1)
Bit Name
ADF
Initial
Value
0
A/D Data Register
ADDRA0
ADDRB0
ADDRC0
ADDRD0
ADDRA1
ADDRB1
ADDRC1
ADDRD1
R/W
R/(W)*
Description
A/D End Flag
Indicates the end of A/D conversion.
[Clearing conditions]
[Setting conditions]
Cleared by reading ADF while ADF = 1, then
writing 0 to ADF
Cleared when DMAC is activated by ADI interrupt
and ADDR is read
Single mode: A/D conversion ends
Multi mode: A/D conversion ends cycling through
Scan mode: A/D conversion ends cycling through
Module
A/D0
A/D1
Rev. 4.00 Sep. 14, 2005 Page 801 of 982
the selected channels
the selected channels
Section 21 A/D Converter
REJ09B0023-0400

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