HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 678

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 18 Multi-Function Timer Pulse Unit (MTU)
18.7.3
When counter clearing on compare match is set, TCNT is cleared in the final state in which it
matches the TGR value (the point at which the count value matched by TCNT is updated).
Consequently, the actual counter frequency is given by the following formula:
Where
18.7.4
If the counter clear signal is generated in the T2 state of a TCNT write cycle, TCNT clearing
takes precedence and the TCNT write is not performed.
Figure 18.71 shows the timing in this case.
Rev. 4.00 Sep. 14, 2005 Page 628 of 982
REJ09B0023-0400
f =
Pφ
Address
Write signal
Counter clear
signal
TCNT
Caution on Period Setting
Conflict between TCNT Write and Clear Operations
f
Pφ : Peripheral clock operating frequency
N
(N + 1)
Figure 18.71 Conflict between TCNT Write and Clear Operations
Pφ
: Counter frequency
: TGR set value
TCNT write cycle
N
TCNT address
T1
T2
H'0000