HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 1003

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Figure 25.41 Synchronous DRAM Self-Refreshing Timing in Low-Frequency Mode
A12/A11*
D31 to D0
A25 to A0
DACKn,
TENDn*
RASU/L
CASU/L
RD/WR
DQMxx
CKIO
CKE
CSn
BS
1
2
Note: 1.
2. Waveform for DACKn and TENDn when active low is selected.
3. Pins D31 to D16 with weak keeper are retained as weak keepers.
t
t
An address pin to be connected to pin A10 of SDRAM.
t
RASD2
CASD2
t
t
t
t
DQMD2
RWD2
AD3
AD3
CSD2
Tp
t
t
RASD2
t
RWD2
CSD2
Tpw
(WTRP = 2 Cycles)
t
t
t
CASD2
CKED2
t
t
t
RASD2
AD3
AD3
CSD2
Trr
(Hi-Z)*
t
t
t
CASD2
RASD2
CSD2
3
Rev. 4.00 Sep. 14, 2005 Page 953 of 982
t
CKED2
Trc
Section 25 Electrical Characteristics
Trc
Trc
REJ09B0023-0400