M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 108

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 84 of 587
Figure 9.4
Main Clock Division Register
b7 b6 b5 b4
NOTES:
1. Set the MCD register after the PRC0 bit in the PRCR register is set to 1 (write enable).
2. When stop mode or low-power consumption mode is entered, bits MCD4 to MCD0 become 01000b.
3. When the PM24 bit in the PM2 register is set to 0 (clock selected by the CM07 bit), access the CAN-associated registers after
In on-chip oscillator mode, bits MCD4 to MCD0 do not become 01000b even if the CM05 bit in the CM0 register is set to 1 (main
clock stops).
bits MCD4 to MCD0 are set to 10010b.
b3
MCD Register
b2
b1
b0
Bit Symbol
(b7-b5)
MCD0
MCD1
MCD2
MCD3
MCD4
Symbol
MCD
−
Main clock division
select bits
Reserved bits
(1)
(2, 3)
Bit Name
000Ch
Address
b4 b3 b2 b1 b0
1 0 0 1 0: Divide-by-1 (no division) mode
0 0 0 1 0: Divide-by-2 mode
0 0 0 1 1: Divide-by-3 mode
0 0 1 0 0: Divide-by-4 mode
0 0 1 1 0: Divide-by-6 mode
0 1 0 0 0: Divide-by-8 mode
0 1 0 1 0: Divide-by-10 mode
0 1 1 0 0: Divide-by-12 mode
0 1 1 1 0: Divide-by-14 mode
0 0 0 0 0: Divide-by-16 mode
Do not set values other than the above
Read as undefined value
Function
9. Clock Generation Circuits
After Reset
XXX0 1000b
RW
RW
RW
RW
RW
RW
−