M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 267

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 243 of 587
Figure 17.23
SDAi
SCLi
i = 0 to 4
IICM, BBS: bits in the UiSMR register
IICM2, SWC, ALS, SWC2, SDHI: bits in the UiSMR2 register
STSPSEL, ACKD, ACKC: bits in the UiSMR4 register
NCH: bit in the UiC0 register
ABT: UiRB register
PDk_m: bit in the Port Pk Direction Register corresponding to the SCLi pin
NOTES:
(note 1, 2)
(note 1, 2)
1. P7_0 and P7_1 do not have the dotted rectangular portion of the circuit. The absolute maximum rating of the input voltage for P7_0 and P7_1 is
2. P6_2, P6_3, P6_6, P6_7, P9_1, P9_2, P9_6, and P9_7 are used with turning off the P channel of the CMOS port all the time. The absolute
from - 0.3 V to 6.0 V.
maximum rating of the input voltage for these ports is from - 0.3 V to VCC1 + 0.3 V.
Noise
Noise
I
filter
filter
2
C Mode Block Diagram
NCH
NCH
in Function Control
Select SDA output
Select SCL output in
Function Control
Register
signal to PDk_m
Falling edge
Transmission
Register
control circuit
control circuit
Logic 0 write
detection
Start condition detection
Stop condition detection
Reception
signal to PDk_m
Logic 1 write
UARTi
control
CLK
UARTi transmit
UARTi transmit
shift register
shift register
9th clock
Falling edge
S Q
R
BBS
S Q
R
SWC
of 9th bit
ABT
D Q
T
SDHI
ALS
NACK
SWC2
D Q
D Q
Start/stop condition
T
T
S Q
R
generation block
ACK
IICM = 0 or
IICM2 = 1
17. Serial Interfaces (UART0 to UART4)
IICM = 0 or
IICM = 1 and
IICM2 = 1
IICM = 1 and
IICM2 = 0
ACKD
IICM2 = 0
1
0
ACKC
0
1
STSPSEL IICM
1
0
STSPSEL
DMA 0 to 3 request
UARTi transmit interrupt request
NACK interrupt request
DMA 0 to 3 request
UARTi receive interrupt request
ACK interrupt request
Start/stop condition detection
interrupt request
0
1
Delay circuit