M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 15

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

24.
25.
26.
23.2
23.3
23.4
25.1
25.2
25.3
25.4
25.5
25.6
25.7
25.8
25.9
25.10
25.11
26.1
26.2
26.3
26.4
26.5
23.1.18 CANi Single-Shot Status Register (CiSSSTR Register) (i = 0, 1) ................................................... 430
23.1.19 CANi Global Mask Register, CANi Local Mask Register A, and CANi Local Mask Register B
23.1.20 CANi Message Slot j Control Register (CiMCTLj Register) (i = 0, 1, j = 0 to 15) ......................... 438
23.1.21 CANi Slot Buffer Select Register (CiSBS Register) (i = 0, 1) ......................................................... 442
23.1.22 CANi Message Slot Buffer j (i = 0, 1; j = 0, 1) ................................................................................ 443
23.1.23 CANi Acceptance Filter Support Register (CiAFS Register) (i = 0, 1) ........................................... 447
23.2.1
23.2.2
23.3.1
23.3.2
23.3.3
23.3.4
23.4.1
23.4.2
26.1.1
26.2.1
26.2.2
26.3.1
26.3.2
26.3.3
26.3.4
26.3.5
26.4.1
26.5.1
Real-Time Port (RTP) ................................................................................................................. 458
Programmable I/O Ports ............................................................................................................. 461
Flash Memory ............................................................................................................................. 493
CAN Clock and CPU Clock .................................................................................................................. 448
Setting and Timing in CAN-Associated Registers ................................................................................ 449
CAN Interrupts ...................................................................................................................................... 453
Port Pi Direction Register (PDi Register, i = 0 to 15) ........................................................................... 461
Port Pi Register (Pi Register, i = 0 to 15) .............................................................................................. 461
Function Select Register A (PSj Register, j = 0 to 9) ............................................................................ 461
Function Select Register B (PSLk Register, k = 0 to 3, 5 to 7, 9) ........................................................ 461
Function Select Register C (PSC, PSC2, PSC3, and PSC6 Registers) ................................................. 461
Function Select Register D (PSD1 and PSD2 Registers) ...................................................................... 462
Function Select Register E (PSE1 and PSE2 Registers) ....................................................................... 462
Pull-up Control Register 0 to 4 (PUR0 to PUR4 Registers) ................................................................. 462
Port Control Register (PCR Register) ................................................................................................... 462
Input Function Select Register (IPS, IPSA, and IPSB Registers) ......................................................... 462
Analog Input and Other Peripheral Function Input ............................................................................... 462
Memory Map ......................................................................................................................................... 494
Functions to Prevent Access to Flash Memory ..................................................................................... 495
CPU Rewrite Mode ............................................................................................................................... 497
Standard Serial I/O Mode ...................................................................................................................... 512
Parallel I/O Mode .................................................................................................................................. 518
(CiGMRk, CiLMARk, and CiLMBRk Registers) (i = 0,1, k = 0 to 4) ............................................ 432
CAN Clock ....................................................................................................................................... 448
CPU Clock ........................................................................................................................................ 448
CAN Module Initialize Timing ........................................................................................................ 449
CAN Transmit Timing ...................................................................................................................... 450
CAN Receive Timing ....................................................................................................................... 451
CAN Bus Error Timing .................................................................................................................... 452
CAN1 Wake-Up Interrupt ................................................................................................................ 454
CANij Interrupt ................................................................................................................................. 454
Boot Mode ........................................................................................................................................ 495
ROM Code Protect Function ............................................................................................................ 495
ID Code Check Function .................................................................................................................. 495
Flash Memory Control Register (FMR0 and FMR1 Registers) ....................................................... 498
Software Commands ......................................................................................................................... 504
Data Protect Function ....................................................................................................................... 509
Status Register (SRD Register) ........................................................................................................ 509
Full Status Check .............................................................................................................................. 510
Pin Handling in Standard Serial I/O Mode ....................................................................................... 517
Boot ROM Area ................................................................................................................................ 518
A - 6