M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 446

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 422 of 587
Figure 23.16
23.1.13 CANi Error Interrupt Mask Register (CiEIMKR Register) (i = 0, 1)
23.1.13.1 BOIM Bit
23.1.13.2 EPIM Bit
23.1.13.3 BEIM Bit
CANi Error Interrupt Mask Register (i = 0, 1)
b7 b6 b5 b4
The BOIM bit determines whether an interrupt request is enabled or disabled when the CAN module is placed
in a bus-off state. When the BOIM bit is set to 1, a bus-off interrupt request is enabled.
The EPIM bit determines whether an interrupt request is enabled or disabled when the CAN module is placed in
an error passive state. When the EPIM bit is set to 1, an error passive interrupt request is enabled.
The BEIM bit determines whether an interrupt request is enabled or disabled when a CAN bus error occurs.
When the BEIM bit is set to 1, a CAN bus error interrupt request is enabled.
Refer to 23.4 CAN Interrupts for details.
NOTE:
1. The value is obtained by setting the SLEEP bit in the CiSLPR register to 1 (sleep mode exited) after reset and supplying the
clock to the CAN module.
b3
b2
C0EIMKR and C1EIMKR Registers
b1
b0
Bit Symbol
(b7-b3)
BOIM
EPIM
BEIM
Symbol
C0EIMKR
C1EIMKR
Bus-off interrupt
mask bit
Error-passive interrupt
mask bit
CAN bus-error interrupt
mask bit
Unimplemented.
Write 0. Read as undefined value.
Bit Name
0214h
0294h
Address
0: Interrupt request masked (disabled)
1: Interrupt request enabled
0: Interrupt request masked (disabled)
1: Interrupt request enabled
0: Interrupt request masked (disabled)
1: Interrupt request enabled
Function
After Reset
XXXX X000b
XXXX X000b
23. CAN Module
(1)
RW
RW
RW
RW

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