M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 602

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 578 of 587
28.15 Programmable I/O Ports
Table 28.5
−: Not affected by the bit setting nor the pin state
NOTE:
(three-phase motor control
(three-phase motor control
timer function not used)
1. The INV03 bit becomes 0 after a low-level (“L”) signal is applied to the NMI pin.
•
timer function used)
•
•
Pins P7_2 to P7_5, P8_0, and P8_1 have the forced cutoff function of the three-phase PWM output. When
these ports are set in output mode (port output, timer output, three-phase PWM output, serial interface output,
intelligent I/O output, RTP output), they are affected by the three-phase motor control timer function and the
NMI pin setting. Table 28.5 shows the INVC0 register setting, NMI pin input level, and output pin states.
The availability of the pull-up resistors is undefined until the internal power voltage stabilizes even if the
RESET pin is held “L”.
The input threshold level varies between the input to the port and input to the peripheral functions. If the port
function and peripheral function share the same pin, the level verified by the peripheral function and the level
obtained by reading the Port Pi register (i = 0 to 15) may vary during the process when the voltage applied to
the pin changes from “H” to “L” or from “L” to “H”.
(Technical update: TN-M16C-102-0309)
INV02 Bit
Setting Value of the INVC0 Register
0
1
INVC0 Register Setting, NMI Pin Level, and Output Pin Status
(three-phase motor control
(three-phase motor control
timer output enabled)
timer output disabled)
INV03 Bit
−
0
1
(1)
terminated)
Input Level
NMI Pin
(forcibly
H
−
−
L
Output functions selected using registers
PS1, PSL1, PSC, PS2, and PSL2
High-impedance states
Output functions selected using registers
PS1, PSL1, PSC, PS2, and PSL2
High-impedance states
Pin States of P7_2 to P7_5, P8_0, P8_1
(when set in output mode)
28. Usage Notes