M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 158

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 134 of 587
12. Watchdog Timer
The watchdog timer is used to detect the program running improperly. The watchdog timer contains a 15-bit free-
running counter. If a write to the WDTS register is not performed due to a program running out of control, the free-
running counter underflows, which results in the watchdog timer interrupt generation or the MCU reset. When
operating the watchdog timer, write to the WDTS register in a shorter cycle than the watchdog timer cycle in such as
the main routine.
Tables 12.1 and 12.2 list specifications of the watchdog timer. Figure 12.1 shows a block diagram of the watchdog
timer. Figures 12.2 and 12.3 show registers associated with the watchdog timer.
Table 12.1
NOTE:
Table 12.2
NOTES:
fCPU: CPU clock frequency
fROC: On-chip oscillator clock frequency
Count operation
Count start condition
When underflows
After underflows
Read from watchdog timer
PM22 bit in PM2 register
CM07 bit in CM0 register
WDC7 bit in WDC register
Clock source
Prescaler
Count source for counter
Time-out period (formula)
Time-out period (reference)
Operation in wait mode,
stop mode, and hold state
1. The watchdog timer shares the same vector with the oscillation stop detection interrupt and Vdet4 detection
1. Once the PM22 bit is set to 1, it cannot be set to 0 by a program.
2. Difference between the calculation result and actual period can be one count source cycle of the counter.
3. A write to the CM10 bit in the CM1 register is disabled. Writing a 1 has no effect and the MCU does not enter
interrupt. When using the watchdog timer interrupt simultaneously with these interrupts, determine whether the
watchdog timer interrupt is generated by reading the D43 bit in the D4INT register in the interrupt routine.
stop mode. The watchdog timer interrupt cannot be used to exit wait mode.
Item
Item
Watchdog Timer Specifications (1/2)
Watchdog Timer Specifications (2/2)
(1)
(2)
Approx. 16.4 ms
fCPU = 32 MHz
fCPU
The free-running counter decrements
Writing to the WDTS register:
One of the following occurs (selectable using the CM06 bit in the CM0 register):
• Watchdog timer interrupt generation
• MCU reset
The counter continues decrementing
(when the watchdog timer interrupt is selected)
A read from bit 4 to bit 0 in the WDC register returns bit 14 to bit 10 of the free-running
counter
A write to the WDTS register initializes a free-running counter and the counter
decrements from 7FFFh
Divide-by-16
1
fCPU
Clock divided by MCD register
1
× 524288
0
0
0
× 16
Approx. 131.1 ms
fCPU
fCPU = 32 MHz
Divide-by-128
1
fCPU
CPU clock
1
Bit Setting and Specification
Stops
× 4194304
0
0
1
× 128
Specification
(1)
fCPU = 32 kHz
fCPU
Divide-by-2
Approx. 2 s
1
Sub clock
fCPU
0 or 1
1
0
1
× 65536
× 2
On-chip oscillator
Approx. 32.8 ms
fROC = 1 MHz
fROC
not available
12. Watchdog Timer
Operates
1
0 or 1
0 or 1
fROC
1
1
× 32768
(3)