M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 410

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B) 22. Intelligent I/O (Group 0 and 1 Communication Function)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 386 of 587
Table 22.19 Pin Settings in UART Mode (Group 1)
Figure 22.51
NOTES:
P7_3
P7_5
P11_0
P11_2
Port
1. Set registers PS1 and PS5 after setting the other registers.
2. Set bits MOD2 to MOD0 in the G1POCR0 register to 111b (use communication function output).
ISTXD1 output G1POCR0
ISRXD1 input
ISTXD1 output G1POCR0
ISRXD1 input
I flag = 0
IIO3IE register: SIO1TE bit = 0
IIO2IE register: SIO1RE bit = 0
IPS register: IPS1 bit
G2BCR0 register = 01111111b
BTSR register = 00h
G2BCR0 register = 00h
G1BCR0 register = 01111111b
G1BCR1 register = 00000010b
G1TMCR2 register = 00000011b
G1POCR0 register = 00000111b
G1POCR2 register = 00000110b
G1POCR3 register = 00000010b
G1PO0 register = n
G1PO3 register = 0001h
G1FS register = 00000100b
G1FE register = 00001101b
G1BCR1 register: BTS bit = 1
CCS register:
Function
Register Settings in Group 1 UART Mode (1/2)
bits CCS3 and CCS2 = 00b
Continuing to Register Settings in Group 1 UART Mode (2/2)
Start Initial Setting
–
–
G1POCR0
Register
(2)
–
IPS1=0
–
IPS1=1
Register
IPS
Interrupt disabled
Group 1 transmit interrupt disabled
Group 1 receive interrupt disabled
Group 1 input pin select bit
Initialize BTSR register
Clock is provided in group 1 to initialize it
Use to generate internal transmit/receive clock
Both edges for time measurement trigger
Use communication function output
Use for receive operation in UART mode
Phase-delayed waveform output mode
n = 0006h to FFFDh Baud rate =
Channel 0, 3: Select waveform generation function
Channel 2: Select time measurement function
Channel 0, 2, and 3 functions enabled
Base timer count starts
Clock generated with a waveform generation function
–
PD7_5=0
–
PD11_2=0
PD7, PD11
Registers
PSC_3=1
–
–
–
Bit Setting
Register
PSC
2(n + 2)
fBT1
PSL1_3=0
–
PSL5_0=0
–
PSL1, PSL5
Registers
PS1_3=1
PS1_5=0
PS5_0=1
PS5_2=0
Registers
PS1, PS5
(1)