M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 299

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 275 of 587
Figure 17.43
UARTi Baud Rate Register
UARTi Transmit/Receive Control Register 0 (i = 5, 6)
b7
b7
b6 b5 b4
NOTES:
NOTES:
0
1. Set bits CLK1 and CLK0 before setting the UiBRG register.
2. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15). To select f2n, set the CST bit
3. The UFORM bit is enabled when bits SMD2 to SMD0 in the UiMR register are set to 001b (clock synchronous mode) or 101b
1. Read-modify-write instructions cannot be used to set the UiBRG register. Refer to Usage Notes for details.
2. Set the UiBRG register after setting bits CLK1 and CLK0 in the UiC0 register.
in the TCSPR register to 1 before setting bits CLK1 and CLK0 to 10b .
(UART mode, 8-bit data length). Set the UFORM bit to 0 when bits SMD2 to SMD0 are set to 100b (UART mode, 7-bit data
length) or 110b (UART mode, 9-bit data length).
b3
U5C0 and U6C0 Registers, U5BRG and U6BRG Registers
b2
b1
b0
b0
If the setting value is n , the UiBRG register divides the count
source by n +1
Bit Symbol
UFORM
CKPOL
TXEPT
CLK0
CLK1
CRD
CRS
Symbol
U5C0, U6C0
Symbol
U5BRG, U6BRG
(b5)
−
UiBRG count source
select bits
CTS function select bit
Transmit shift register
empty flag
CTS function disable bit
Reserved bit
CLK polarity select bit
Bit order select bit
(1, 2)
(1)
(i = 5, 6)
Bit Name
Function
(3)
Address
01C4h, 01CCh
Address
01C1h, 01C9h
b1 b0
0 0: f1 selected
0 1: f8 selected
1 0: f2n selected
1 1: Do not set to this value
Enabled when CRD=0
0: CTS function selected
1: CTS function not selected
0: Data in the transmit shift register
1: No data in the transmit shift register
0: CTS function enabled
1: CTS function disabled
Set to 0
0: Transmit data output at the falling edge and
1: Transmit data output at the rising edge and
0: LSB first
1: MSB first
(during transmit operation)
(transmit operation is completed)
receive data input at the rising edge of the
serial clock
receive data input at the falling edge of the
serial clock
17. Serial Interfaces (UART5 and UART6)
(2)
Function
Setting Range
00h to FFh
After Reset
0000 1000b
After Reset
Undefined
WO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO