M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 198

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 174 of 587
15.1.2
Table 15.4
NOTE:
Count source
Count operation
Number of counting
Count start condition
Count stop condition
Interrupt request generation timing When the timer overflows or underflows
TAiIN pin function
TAiOUT pin function
Read from timer
Write to timer
Selectable function
1. Wait for one or more count source cycles to write after the count starts.
In event counter mode, the timer counts overflows/underflows of another timer, or the external pulse input.
Timers A2, A3, and A4 can count externally generated two-phase signals.
Table 15.4 lists specifications of event counter mode when not handling two-phase pulse signals.
Table 15.5 lists specifications of event counter mode when handling two-phase pulse signals with timers A2,
A3, and A4. Figure 15.15 shows a event counter mode operation when not handling two-phase pulse signals.
Figure 15.16 shows a event counter mode operation when handling two-phase pulse signals with timers A2, A3,
and A4.
Event Counter Mode
Item
Specifications of Event Counter Mode When Not Handling Two-Phase Pulse Signals
• External signal applied to the TAiIN pin (i = 0 to 4) (valid edge is selectable by
• Timer B2 overflows or underflows
• Timer Aj overflows or underflows (j = i - 1, except j = 4 if i = 0)
• Timer Ak overflows or underflows (k = i + 1 except k = 0 if i = 4)
• Count direction (increment or decrement) can be selected by external signal or
• Reload/Free-run type can be selected.
(FFFFh - n + 1): when incrementing
n + 1: when decrementing
The TAiS bit in the TABSR register is set to 1 (count starts)
The TAiS bit is set to 0 (count stops)
Count source input
Pulse output, or input to select the count direction
A read from the TAi register returns a counter value
• A write to the TAi register while the count is stopped:
• A write to the TAi register while counting:
Pulse output function
n: setting value of the TAi register, 0000h to FFFFh
The polarity of the TAiOUT pin is inverted whenever the timer overflows or
underflows. The TAiOUT pin outputs “L” signal while the TAiS bit is 0 (count
stops).
a program)
by a program.
Reload function: The contents of the reload register are reloaded into the
counter and the count continues when the timer underflows or overflows.
Free-running function: The counter continues running without reloading when
the timer underflows or overflows.
The value is written to both the reload register and the counter.
The value is written to the reload register (It is transferred to the counter at the
next reload timing).
(1)
Specification
15. Timer A

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