M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 133

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 109 of 587
11.4
Figure 11.2
The high-speed interrupt executes an interrupt sequence in five cycles and returns from the interrupt routine in
three cycles. When the FSIT bit in the RLVL register is set to 1 (interrupt priority level 7 is used for the high-
speed interrupt), the interrupt that bits ILVL2 to ILVL0 in the Interrupt Control Register are set to 111b (level 7)
becomes the high-speed interrupt.
Only one interrupt can be set as the high-speed interrupt. To use the high-speed interrupt, do not set multiple
interrupts to interrupt priority level 7. Set the DMAII bit in the RLVL register to 0 (interrupt priority level 7 is
used for interrupt) to use the high-speed interrupt.
Set the starting address of a high-speed interrupt routine in the VCT register.
When the high-speed interrupt is acknowledged, the FLG register value is saved into the SVF register and the
PC value is saved into the SVP register. A program is executed from an address indicated by the VCT register.
Use the FREIT instruction to return from a high-speed interrupt routine. Values saved into registers SVF and
SVP are restored to the FLG register and PC by executing the FREIT instruction.
The high-speed interrupt, and DMA2 and DMA3 share some of the registers. When using the high-speed
interrupt, neither DMA2 nor DMA3 is available. DMA0 and DMA1 can still be used.
Figure 11.2 shows a procedure to use high-speed interrupt.
I flag = 0
RLVL register: FSIT bit = 1
VCT regsiter: Set the starting address of
Set the peripheral function used for the high-speed
interrupt source
Interrupt Control Register:
I flag = 1
High-Speed Interrupt
Operate peripheral functions
Procedure to Use High-Speed Interrupt
the high-speed interrupt routine
DMAII bit = 0
Bits ILVL2 to ILVL0 = 111b (level 7)
Start
End
Interrupt disabled
Interrupt priority level 7 is used for the high-speed interrupt
Interrupt priority level 7 is used for interrupt
Set the interrupt priority level in the Interrupt Control Register
for the peripheral function used for the high-speed
interrupt source.
Interrupt enabled
11. Interrupts