M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 416

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 392 of 587
22.5
Figure 22.55 Group 2 Communication Function Block Diagram
The signal output when G2PO6 or
G2PO7 register matches a base timer
ISRXD2
The signal output when G2POi register
(i = 0 to 7) matches a base timer
In the group 2 communication function, variable data length clock synchronous serial communication is available.
Figure 22.55 shows block diagram of group 2 communication function. Figures 22.56 to 22.60 show registers
associated with the communication function.
IEIN/
OPOL, IPOL: Bits in the G2CR register
DF: Bit in the IECR register
IE0R to IE2R: Bits in registers IIO7IR and IIO8IR
SIO2TR : Bit in the IIO6IR register
SIO2RR: Bit in the IIO5IR register
NOTE:
generation clock
1. After a clock, which is selected in the G2BCR0 register, is supplied to the registers, each register value becomes the after reset value.
Group 2 Communication Function
Channel 2
ISCLK2
Digital
filter
0
1
selecter
Clock
DF
counter
Polarity
invert
IPOL
Bit
Start bit detection
function
Receive register
ACK calculation
Transmit parity
G2TB register
Transmit shift
Receive parity
Byte counter
calculation
calculation
register
Address detect
ID detection
detection
function
All "F"
22. Intelligent I/O (Group 2 Communication Function)
G2RB register
length detect
Statement
function
Output control
interrupt control
Latch
function
IE, serial
interface
Arbitration lost
detection
Polarity
OPOL
invert
IE start bit interrupt request
(IE0R to IE2R)
IE transmit interrupt request
(IE0R to IE2R)
IE receive interrupt request
(IE0R to IE2R)
Clock synchronous mode
transmit interrupt request
(SIO2TR)
Clock synchronous mode
receive interrupt request
(SIO2RR)
Serial clock output from
ISCLK2 pin
Transfer data output from
ISTXD2 / IEOUT pin