M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 222

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 198 of 587
Figure 16.2
Three-Phase PWM Control Register 0
b7 b6 b5 b4
NOTES:
1. Set the INVC0 register after the PRC1 bit in the PRCR register is set to 1 (write enable). Set bits INV06 and INV02 to INV00
2. Set the INV01 bit to 1 after setting a value to the ICTB2 register. Also, when the INV01 bit is set to 1, set the timer A1 count start
3. Set pins after the INV02 bit is set to 1. Refer to the table, Pin settings when using three-phase motor control timer function .
4. Set the INV02 bit to 1 to operate the dead time timer, U-, V-, and W-phase output control circuits, and ICTB2 counter.
5. When the INV03 bit is set to 0 and the INV02 bit to 1, pins U, U, V, V, W, and W (including when other output functions are
6. The INV03 bit becomes 0 when one of the following occurs:
7. The INV05 bit cannot be set to 1 by a program. To set the INV05 bit to 0, write a 0 to the INV04 bit.
while timers A1,A2, A4, and B2 are stopped.
bit to 1 prior to the first timer B2 underflow.
assiged to these pins) are all placed in high-impedance states.
-Reset
-The both upper and lower arms output the active level signals at the same time while the INV04 bit is set to 1
-The INV03 bit is set to 0 by a program
-Signal applied to the NMI pin changes from "H" to "L" (while an "L" is applied to the NMI pin, the INV03 bit cannot be set to 1).
b3
b2
INVC0 Register
b1
b0
Bit Symbol
INV00
INV01
INV02
INV03
INV04
INV05
INV06
INV07
Symbol
INVC0
ICTB2 count condition
select bits
Three-phase motor control timer
function enable bit
Three-phase motor control timer
output control bit
Upper and lower arm
simultaneous turn-on disable bit
Upper and lower arm
simultaneous turn-on detect flag
Modulation mode select bit
Software trigger select bit
Bit Name
(3)
(1)
Address
0308h
b1 b0
0 0:
0 1:
1 0: Timer B2 underflow at the rising edge of the
1 1: Timer B2 underflow at the falling edge of the
0: Three-phase motor control timer function not used
1: Three-phase motor control timer function used
0:
1:
0: Simultaneous turn-on enabled
1: Simultaneous turn-on disabled
0: Not detected
1: Detected
0: Triangular wave modulation mode
1: Sawtooth wave modulation mode
Transfer trigger is generated when the INV07 bit
is set to 1. Trigger for the dead time timer is also
generated when the INV06 bit is set to 1.
This bit is read as 0.
Three-phase motor control timer output disabled
Three-phase motor control timer output enabled
timer A1 reload control signal
(every odd-numbered timer B2 underflow)
timer A1 reload control signal
(every even-numbered timer B2 underflow)
16. Three-Phase Motor Control Timer Function
Timer B2 underflow
(7)
Function
(2)
(2)
After Reset
00h
(4,5)
(5,6)
RW
RW
RW
RW
RW
RW
RW
RW
RO

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