M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 151

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 127 of 587
11.10 Address Match Interrupt
Figure 11.16
The address match interrupt is non-maskable. This interrupt occurs immediately before executing the instruction
stored in the address specified by the RMADi register (i=0 to 7). Eight addresses can be set for the address match
interrupt. The AIERi bit in the AIER register determines whether the interrupt is enabled or disabled.
Figure 11.16 shows registers associated with the address match interrupt.
Set the starting address of the instruction in the RMADi register. The address match interrupt does not occur if a
table data or any address other than the starting address of the instruction is set.
b23
Address Match Interrupt Register i (i = 0 to 7)
Address Match Interrupt Enable Register
b7 b6 b5 b4
b16 b15
b3
b8
b2
RMAD0 to RMAD7 Registers, AIER Register
b7
b1
b0
b0
Address register for the address match interrupt
Bit Symbol
AIER0
AIER1
AIER2
AIER3
AIER4
AIER5
AIER6
AIER7
Symbol
RMAD0
RMAD1
RMAD2
RMAD3
RMAD4
RMAD5
RMAD6
RMAD7
Symbol
AIER
Address match interrupt 0
enable bit
Address match interrupt 1
enable bit
Address match interrupt 2
enable bit
Address match interrupt 3
enable bit
Address match interrupt 4
enable bit
Address match interrupt 5
enable bit
Address match interrupt 6
enable bit
Address match interrupt 7
enable bit
Bit Name
Function
Address
0009h
Address
0012h to 0010h
0016h to 0014h
001Ah to 0018h
001Eh to 001Ch
002Ah to 0028h
002Eh to 002Ch
003Ah to 0038h
003Eh to 003Ch
0: interrupt disabled
1: interrupt enabled
0: interrupt disabled
1: interrupt enabled
0: interrupt disabled
1: interrupt enabled
0: interrupt disabled
1: interrupt enabled
0: interrupt disabled
1: interrupt enabled
0: interrupt disabled
1: interrupt enabled
0: interrupt disabled
1: interrupt enabled
0: interrupt disabled
1: interrupt enabled
Function
000000h to FFFFFFh
Setting Range
After Reset
After Reset
000000h
000000h
000000h
000000h
000000h
000000h
000000h
000000h
00h
11. Interrupts
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW

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