M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 257

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 233 of 587
17.1.1.4 Continuous Receive Mode
17.1.1.5 CTS/RTS Function
17.1.1.6 Procedure When the Communication Error is Occurred
Continuous receive mode can be used when all of the following conditions are met.
When the UiRRM bit in the UiC1 register is set to 1 (continuous receive mode enabled), the TI bit in the UiC1
register becomes 0 (data in the UiTB register) by reading the UiRB register. Do not set dummy data to the UiTB
register if the UiRRM bit is set to 1.
Follow the procedure below when a communication error is occurred in clock synchronous mode.
(1) Set the TE bit in the UiC1 register (i = 0 to 4) to 0 (transmit operation disabled) and the RE bit to 0
(2) Set bits SMD2 to SMD0 in the UiMR register to 000b (serial interface disabled).
(3) Set bits SMD2 to SMD0 in the UiMR register to 001b (clock synchronous mode).
(4) Set the TE bit to 1 (transmit operation enabled) and the RE bit to 1 (receive operation enabled).
CTS Function
Transmit and receive operation is controlled by using the input signal to the CTSi pin (i = 0 to 4). To use the
CTS function, select the I/O port in the Function Select Register, set the CRD bit in the UiC0 register to 0
(CTS function enabled), and the CRS bit to 0 (CTS function selected).
With the CTS function used, the transmit and receive operation starts when all the following conditions are
met and an “L” signal is applied to the CTSi pin.
When a high-level (“H”) signal is applied to the CTSi pin during transmitting and receiving, the transmit
and receive operation is disabled after the transmit and receive operation in progress is completed.
RTS Function
The MCU can inform the external device that it is ready for a transmit and receive operation by using the
output signal from the RTSi pin. To use the RTS function, select the RTSi pin in the Function Select
Register.
With the RTS function used, the RTSi pin outputs an “L” signal when all the following conditions are met,
and outputs an “H” when the serial clock is input to the CLKi pin.
External clock is selected (the CKDIR bit in the UiMR register (i = 0 to 4) is set to 1)
RTS function is disabled (RTSi pin is not selected in the Function Select Register)
-The TE bit in the UiC1 register is set to 1 (transmit operation enabled)
-The TI bit in the UiC1 register is 0 (data in the UiTB register)
-The RE bit in the UiC1 register is set to 1 (receive operation enabled)
-The RI bit in the UiC1 register is 0 (no data in the UiRB register)
-The TE bit is set to 1 (transmit operation enabled)
-The RE bit is set to 1 (receive operation enabled)
-The TI bit is 0 (data in the UiTB register)
(receive operation disabled).
(If transmit-only operation is performed, the RE bit setting is not required)
(If transmit-only operation is performed, the RE bit setting is not required)
17. Serial Interfaces (UART0 to UART4)

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