M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 223

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 199 of 587
Figure 16.3
Three-Phase PWM Control Register 1
b7 b6 b5 b4
0
NOTES:
1. Set the INVC1 register after the PRC1 bit in the PRCR register is set to 1 (write enable). Set the INVC1 register while timers A1,
2. The INV13 bit is enabled only when the INV06 bit is set to 0 (triangular wave modulation mode) and the INV11 bit to 1.
3. If the following conditions are all met, set the INV16 bit to 1.
A2, A4, and B2 are stopped.
If any of the above conditions is not met, set the INV16 bit to 0.
- The INV15 bit is set to 0
- Bits Dij (i = U, V or W, j = 0, 1) and DiBj in the IDBj register always have different values when the INV03 bit in the INVC0
register is set to 1 (three-phase control timer output enabled).
(The upper arm and lower arm always output opposite level signals at any time except dead time.)
b3
b2
INVC1 Register
b1
b0
Bit Symbol
INV10
INV11
INV12
INV13
INV14
INV15
INV16
Symbol
INVC1
(b7)
−
Timers A1, A2, and A4
start trigger select bit
Timers A11, A21, and A41
control bit
Dead time timer
count source (fDT) select bit
Carrier wave rise/fall
detect flag
Active level control bit
Dead time disable bit
Dead time timer trigger
select bit
Reserved bit
(2)
Bit Name
(1)
Address
0309h
0: Timer B2 underflow
1: Timer B2 underflow and a write to the TB2
0: Timers A11, A21, and A41 not used
1: Timers A11, A21, and A41 used
0: f1
1: f1 divided-by-2
0: Timer B2 underflow occurred an even number
1: Timer B2 underflow occurred an odd number
0: Active Low
1: Active High
0: Dead time enabled
1: Dead time disabled
0: Falling edge of one-shot pulse of timer
1: Rising edge of the three-phase output shift
Set to 0
register
(Three-phase mode 0)
(Three-phase mode 1)
of times
of times
(A4, A1, and A2
register (U-, V-, W-phase)
16. Three-Phase Motor Control Timer Function
(3)
Function
)
After Reset
00h
RW
RW
RW
RW
RW
RW
RW
RW
RO