M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 134

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 110 of 587
11.5
Figure 11.3
11.5.1
Table 11.1
11.5.2
Undefined
instruction
Overflow
BRK instruction
Address match
−
Watchdog timer
−
NMI
Reset
There are four bytes in each interrupt vector. Set the starting address of an interrupt routine in each interrupt vector.
When an interrupt request is acknowledged, an interrupt routine is executed from the address set in its interrupt
vector. Figure 11.3 shows an interrupt vector.
The fixed vector table is allocated in addresses FFFFDCh to FFFFFFh. Table 11.1 lists the fixed vector table.
The ID code which is used for the ID code check function of the flash memory is stored to the part of the fixed
vector table. Refer to 26.2.2 ID Code Check Function for details.
The relocatable vector table occupies 256 bytes beginning from the address set in the INTB register. Tables 11.2
and 11.3 list the relocatable vector table.
Set an even address to the starting address of the vector set in the INTB register to increase the interrupt
sequence execution rate.
Interrupt
Source
Interrupts and Interrupt Vectors
Fixed Vector Table
Relocatable Vector Table
Interrupt Vector
Fixed Vector Table
FFFFDCh to FFFFDFh
FFFFE0h to FFFFE3h
FFFFE4h to FFFFE7h
FFFFE8h to FFFFEBh
FFFFECh to FFFFEFh
FFFFF0h to FFFFF3h
FFFFF4h to FFFFF7h
FFFFF8h to FFFFFBh
FFFFFCh to FFFFFFh
Vector address+0
Vector address+1
Vector address+2
Vector address+3
Address (L) to Address (H)
Vector Addresses
MSB
8 Middle-order bits of address
8 High-order bits of address
8 Low-order bits of address
If the content of the address
FFFFE7h is FFh, the CPU
executes from the address
stored in the software interrupt
number 0 in the relocatable
vector table.
Reserved space
These addresses are used for
the watchdog timer interrupt,
oscillation stop detection
interrupt, and Vdet4 detection
interrupt.
Reserved space
00h
Remarks
LSB
M32C/80 series
software manual
Voltage detection function,
Clock generation circuit,
Watchdog timer
Reset
Reference
11. Interrupts