M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 325

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 301 of 587
18.1.1
Table 18.4
Function
Analog input pins
Start Condition
Stop condition
Interrupt request generation timing When the A/D conversion is completed
Reading A/D conversion result
In one-shot mode, analog voltage applied to a selected pin is converted to a digital code once. Table 18.4 lists
specifications of one-shot mode.
One-Shot Mode
Item
One-Shot Mode Specifications
Analog voltage applied to a selected pin is converted once
Select one pin from AN_0 to AN_7, AN0_0 to AN0_7, AN2_0 to AN2_7, AN15_0
to AN15_7, ANEX0, or ANEX1
The following register settings determine which pin is used:
• Bits CH2 to CH0 in the AD0CON0 register
• Bits OPA1 and OPA0 in the AD0CON1 register
• Bits APS1 and APS0 in the AD0CON2 register
Software trigger is selected (TRG bit in the AD0CON0 register = 0):
• The ADST bit in the AD0CON0 register is set to 1 (A/D conversion starts)
External trigger, hardware trigger is selected (TRG bit = 1):
• TRG0 bit in the AD0CON2 register = 0
• TRG0 bit = 1
• A/D conversion is completed (the ADST bit becomes 0 when software trigger is
• Set the ADST bit to 0 by a program (A/D conversion stops).
• DMAC operating mode is not used (DUS bit in the AD0CON3 register = 0):
• DMAC operating mode is used (DUS bit = 1):
The falling edge is detected on the ADTRG pin after the ADST bit is set to 1
Timer B2 interrupt request of three-phase motor control timer function (after
the ICTB2 register completes counting) is generated after the ADST bit is set
to 1.
selected).
Read the AD0j register (j = 0 to 7) corresponding to a selected pin by a
program.
A/D conversion result is stored into the AD00 register after A/D conversion is
completed. Then, DMAC transfers the data from the AD00 register to a given
memory space. (Refer to 13. DMAC for DMAC settings)
Specification
18. A/D Converter