M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 109

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 85 of 587
Figure 9.5
Oscillation Stop Detection Register
b7
0
b6 b5 b4
0
NOTES:
0
1. Set the CM2 register after the PRC0 bit in the PRCR register is set to 1 (write enable).
2. If the PM21 bit in the PM2 register is set to 1 (disables a clock change), a write to the CM20 bit has no effect.
3. When a loss of the main clock is detected while the CM20 bit is set to 1, the CM21 bit becomes 1.
4. When both the CM20 and CM23 bits are set to 1, do not set the CM21 bit to 0.
5. When a loss of the main clock is detected, the CM22 bit becomes 1. The CM22 bit can only be set to 0, not 1, by a program.
6. Determine the main clock state by reading the CM23 bit several times after the oscillation stop detection interrupt is generated.
Although the main clock restarts oscillating, the CM21 bit does not become 0. To use the main clock as the CPU clock source
If the CM22 bit is set to 0 by a program while the main clock is stopped, the CM22 bit does not become 1 until another loss of
after the main clock restarts oscillating, set the CM21 bit to 0 by a program.
the main clock is detected after the main clock restarts oscillating.
0
b3
b2
CM2 Register
b1
b0
Bit Symbol
(b7-b4)
CM20
CM21
CM22
CM23
Symbol
CM2
−
Oscillation stop detection
enable bit
CPU clock select bit 2
Oscillation stop detection flag
Main clock monitor flag
Reserved bits
(2)
Bit Name
(1)
(3, 4)
(6)
Address
000Dh
(5)
0: Oscillation stop detect function not used
1: Oscillation stop detect function used
0: Clock selected by the CM17 bit
1: On-chip oscillator clock
0: Loss of main clock not detected
1: Loss of main clock detected
0: Main clock oscillates
1: Main clock stops
Set to 0
Function
9. Clock Generation Circuits
After Reset
00h
RW
RW
RW
RW
RW
RO