M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 176

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 152 of 587
Figure 14.1
Exit Priority Register
b7 b6 b5 b4
NOTES:
1. The MCU exits stop or wait mode when an interrupt priority level of a requested interrupt is higher than a level set using bits
2. Do not set both the FSIT and DMAII bits to 1.
3. Only one interrupt can have the interrupt priority level 7 when selecting the high-speed interrupt.
4. The DMAII bit is undefined after reset. To use interrupt priority level 7 for an interrupt, set it to 0 before setting the Interrupt
Set either the FSIT bit or the DMAII bit to 1 before setting bits ILVL2 to ILVL0 in the Interrupt Control Register to 111b.
Control Register.
RLVL2 to RLVL0. Set bits RLVL2 to RLVL0 to the same value as IPL in the FLG register.
b3
RLVL Register
b2
b1
b0
Bit Symbol
(b7-b6)
RLVL0
RLVL1
RLVL2
DMAII
FSIT
(b4)
Symbol
RLVL
−
−
Exit wait mode/stop mode
interrupt priority level
control bits
High-speed interrupt select bit
Unimplemented.
Write 0. Read as undefined value.
DMACII select bit
Unimplemented.
Write 0. Read as undefined value.
(1)
Bit Name
(4)
Address
009Fh
b2 b1 b0
0 0 0: Level 0
0 0 1: Level 1
0 1 0: Level 2
0 1 1: Level 3
1 0 0: Level 4
1 0 1: Level 5
1 1 0: Level 6
1 1 1: Level 7
0: Interrupt priority level 7 is used for normal
1: Interrupt priority level 7 is used for high-speed
0: Interrupt priority level 7 is used for interrupt
1: Interrupt priority level 7 is used for DMACII
interrupt
interrupt
transfer
(2)
(2)(3)
Function
After Reset
XXXX 0000b
RW
RW
RW
RW
RW
RW
14. DMACII
−
−