M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 260

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 236 of 587
Figure 17.17
Receive operation starts when the start bit is detected.
Read the UiRB register when the receive operation is completed.
i = 0 to 4
fEXT: clock input to the CLKi pin when the external clock is selected
NOTES:
Transmit operation starts by writing data to the UiTB register
1. Set bits SMD2 to SMD0 to the following: 100b (7 bits long), 101b (8 bits long), or 110b (9 bits long).
2. A bit order can be selected when 8-bit data length is selected. Set to 0 when 7-bit or 9-bit data length is selected.
3. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15).
4. Whether data logic is inverted or not can be selected when 7-bit or 8-bit data length is selected. Set to 0 when 9-bit data
I flag = 0
UiMR register: bits SMD2 to SMD0
UiSMR register = 00h
UiSMR2 register = 00h
UiSMR3 register = 00h
UiSMR4 register = 00h
UiC0 register: bits CLK1 and CLK0
UiBRG register = m
UiC1 register: TE bit = 0
SiTIC register: bits ILVL2 to ILVL0
SiRIC register: bits ILVL2 to ILVL0
I flag = 1
UiC1 register: TE bit = 1
length is selected.
Pin settings in the Function Select Registers
Register Settings in UART Mode
CRS bit
CRD bit
NCH bit
CKPOL bit = 0
UFORM bit
RE bit = 0
UiIRS bit
UiRRM bit = 0
UiLCH bit
bit 7 = 0
RE bit = 1
CKDIR bit
STPS bit
PRY bit
PRYE bit
IOPOL bit
IR bit = 0
IR bit = 0
Start initial setting
End itinial setting
Interrupt disabled
UART mode
Clock select bit
Stop bit length select bit
Parity select bit
Parity enable bit
TXD, RXD I/O polarity switch bit
UiBRG register count source select bits
CTS function select bit
CTS function disable bit
Data output select bit
Bit order select bit
m = 00h to FFh
Transmit operation disabled
Receive operation disabled
UARTi transmit interrupt source select bit
Data logic select bit
Transmit interrupt priority level select bits
Interrupt not requested
Receive interrupt priority level select bits
Interrupt not requested
Interrupt enabled
Transmit operation enabled
Receive operation enabled
(1)
select bits
(2)
Baud rate =
(4)
17. Serial Interfaces (UART0 to UART4)
16(m+1)
fj
fj = f1, f8, f2n
(3)
, fEXT

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