M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 153

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 129 of 587
Figure 11.18
Interrupt Request Register
b7 b6 b5 b4
Bit Symbols for the Interrupt Request Register
NOTES:
Symbol
IIO10IR
IIO11IR
IIO0IR
IIO1IR
IIO2IR
IIO3IR
IIO4IR
IIO5IR
IIO6IR
IIO7IR
IIO8IR
IIO9IR
BTqR: Intelligent I/O group q base timer interrupt request
TM1jR: Intelligent I/O group 1 time measurement function j interrupt request
POqjR: Intelligent I/O group q waveform generation function j interrupt request
SIOkRR: Intelligent I/O group k receive interrupt request
SIOkTR: Intelligent I/O group k transmit interrupt request
GmTOR: Intelligent I/O group m HDLC data processing function interrupt request (TO: Transmit Output)
GmRIR: Intelligent I/O group m HDLC data processing function interrupt request (RI: Receive Input)
SRTmR: Intelligent I/O group m special communication function interrupt request
IEkR: Intelligent I/O group 2 IEBus communication function interrupt request
CAN0kR: CAN0 communication function interrupt request
CAN1kR: CAN1 communication function interrupt request
CAN1WUR: CAN1 wake-up interrupt request
INTnR: INTn interrupt request
UpTR: UARTp transmit interrupt request
UpRR: UARTp receive interrupt request
−: Reserved bit. Set to 0
1. See table below for bit symbols.
2. These bits can be set to only 0. Do not write a 1 to these bits.
b3
IIO0IR to IIO11IR Registers
b2
Address
00AAh
00ABh
00A0h
00A1h
00A2h
00A3h
00A4h
00A5h
00A6h
00A7h
00A8h
00A9h
b1
b0
Bit Symbol
CAN10R
CAN11R
CAN12R
CAN00R
CAN01R
CAN02R
SRT0R
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
IE0R
IE1R
Bit 7
(b0)
Symbol
IIO0IR to IIO11IR
−
−
−
−
CAN1WUR
SRT1R
INT6R
INT7R
INT8R
Unimplemented.
Write 0. Read as undefined value.
Interrupt request flag 1
Interrupt request flag 2
Interrupt request flag 3
Interrupt request flag 4
Interrupt request flag 5
Interrupt request flag 6
Interrupt request flag 7
U5RR
U5TR
IE2R
Bit 6
−
−
−
−
SIO0RR
SIO1RR
SIO0TR
SIO1TR
U6RR
U6TR
Bit 5
−
−
−
−
−
−
SIO2RR
SIO2TR
G0TOR
G1TOR
G0RIR
G1RIR
Address
See below
BT1R
BT2R
Bit 4
−
−
−
−
0: Interrupt not requested
1: Interrupt requested
0: Interrupt not requested
1: Interrupt requested
0: Interrupt not requested
1: Interrupt requested
0: Interrupt not requested
1: Interrupt requested
0: Interrupt not requested
1: Interrupt requested
0: Interrupt not requested
1: Interrupt requested
0: Interrupt not requested
1: Interrupt requested
Function
PO27R
Bit 3
−
−
−
−
−
−
−
−
−
−
−
TM13R/PO13R
TM14R/PO14R
TM12R/PO12R
TM10R/PO10R
TM17R/PO17R
PO21R
PO20R
PO22R
PO23R
PO24R
PO25R
PO26R
Bit 2
(2)
(2)
(2)
(2)
(2)
(2)
(2)
TM11R/PO11R
TM15R/PO15R
TM16R/PO16R
Bit 1
After Reset
0000 000Xb
−
−
−
−
−
−
−
−
−
j = 0 to 7
k = 0 to 2
m = 0, 1
n = 6 to 8
p = 5, 6
q = 1, 2
11. Interrupts
RW
RW
RW
RW
RW
RW
RW
RW
Bit 0
−
−
−
−
−
−
−
−
−
−
−
−
−