M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 91

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 67 of 587
Figure 8.2
Chip-select: CSk
Chip-select: CSp
Chip-select: CSk
Example 1:
After accessing the external space, both address bus
and chip-select output change
When the MCU accesses the external space j
specified by another chip-select output in the next
cycle after having accessed the external space i, both
address bus and chip-select output change.
Example 3:
After accessing the external space, the address bus
changes but the chip-select output does not.
When the MCU accesses the space i specified by the
same chip-select output in the next cycle after having
accessed the external space i, the address bus
changes but the chip-select output does not.
Address bus
Address bus
i = 0 to 3
j = 0 to 3, excluding i
k = 0 to 3
p = 0 to 3, excluding k
CS1 outputs an "L" signal while accessing the external space 0.
CS2 outputs an "L" signal while accessing the external space 1.
CS3 outputs an "L" signal while accessing the external space 2.
CS0 outputs an "L" signal while accessing the external space 3.
Data bus
Data bus
Address Bus and Chip-Select Outputs (Separate Bus)
NOTE:
Access
external
space i
Access
external
space i
Address
Address
1. The above examples show the address bus and chip-select output in two consecutive bus cycles.
Data
Data
Depending on the combination, the chip-select signal can be more than two bus cycles.
Access another
external space j
Access the same
external space i
Data
Data
Chip-select: CSk
Chip-select: CSk
Address bus
Address bus
Example 2:
After accessing an external space, the chip-select
output changes but the address bus does not.
When the MCU accesses SFR or internal ROM/
RAM area in the next cycle after having accessed
an external space, the chip-select signal changes
but the address bus does not.
Example 4:
After accessing an external space, neither address
bus nor chip-select signal changes.
When the MCU does not access any spaces in the
next cycle after having accessed an external space
(no instruction prefetch is performed), neither
address bus nor chip-select signal changes.
Data bus
Data bus
Access
external
space
Access
external
space
Data
Data
Address
Address
No accesss to
external space
Access SFR,
internal ROM/
RAM
8. Bus