M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 361

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 337 of 587
Table 22.3
NOTE:
Count source (fBT2)
Count operation
Count start condition
Count stop condition
Base timer reset condition
Value when the base timer is
in reset state
Interrupt request
generation timing
Read from base timer
Write to base timer
1. When bits RST2 and RST1 in the G2BCR1 register are set to 01b (base timer is reset by matching the G2PO0
register), the setting range of the G2PO0 register must be 0001h to FFFDh.
Item
Base Timer Specifications (Group 2)
• f1 divided by 2(n+1)
• Counter increments
• When the base timers in groups 1 and 2 start counting independently:
• When the base timers in groups 1 and 2 start counting simultaneously:
Base timer count stops when both of the following conditions are met:
• The BT2S bit in the BTSR register is set to 0 (base timer reset)
• The BTS bit in the G2BCR1 register to 0 (base timer reset)
• The base timer value matches the G2PO0 register value
• Bit 15 of the base timer overflows
• When the base timer in group 1 is reset
• Reset request from the communication function
0000h
When bit 14 or 15 of the base timer is changed from 1 to 0
• Count value is returned when reading the G2BT register while the base timer is
• Undefined value is returned when reading the G2BT register while the base timer is
• When a value is written while the base timer is counting, the count continues from
• No value can be written while base timer is in reset
The BT2R bit in the IIO8IR register becomes 1 (interrupt requested) when the
interrupt request is generated.
Set the BTS bit in the G2BCR1 register to 1 (base timer count starts)
Set bits BT2S and BT1S in the BTSR register to 11b (base timer count starts)
counting
in reset state
the value written
n: determined by bits DIV4 to DIV0 in the G2BCR0 register (n = 0 to 31);
no division when n = 31
Specification
22. Intelligent I/O (Base Timer)
(1)