M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 462

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 438 of 587
Figure 23.30
23.1.20 CANi Message Slot j Control Register (CiMCTLj Register) (i = 0, 1, j = 0 to 15)
CANi Message Slot j Control Register (i = 0,1, j = 0 to 15)
b7 b6 b5 b4
NOTES:
1. The CiMCTLj register can be accessed when the BANKSEL bit in the CiCTLR1 register is set to 0 (message slot control register
2. The value is obtained by setting the SLEEP bit in the CiSLPR register to 1 (sleep mode exited) after reset, supplying the clock to
3. Registers C0MCTL0 to C0MCTL4 share addresses with registers C0LMAR0 to C0LMAR4, and registers C0MCTL8 to
4. Registers C1MCTL0 to C1MCTL4 share addresses with registers C1LMAR0 to C1LMAR4, and registers C1MCTL8 to
5. Set the bit to 0 by a program. Writing a 1 has no effect.
6. BasicCAN mode can be used with the message slot 14 and 15.
7. Do not set both the RECREQ and TRMREQ bits to 1 simultaneously.
C0MCTL12 with registers C0LMBR0 to C0LMBR4 respectively.
C1MCTL12 with registers C1LMBR0 to C1LMBR4 respectively.
and single-shot register selected).
the CAN module, and setting the BANKSEL bit to 0.
b3
b2
C0MCTL0 to C0MCTL15 and C1MCTL0 to C1MCTL15 Registers
b1
b0
TRMACTIVE
REMACTIVE
INVALDATA
transmitting,
transmitting,
MSGLOST
Bit Symbol
SENTDATA
RSPLOCK
NEWDATA
receiving,
receiving,
REMOTE
RECREQ
TRMREQ
When
When
When
When
Symbol
C0MCTL0 to C0MCTL15
C1MCTL0 to C1MCTL15
Transmit complete flag
Receive complete flag
Transmitting flag
Receiving flag
Overwrite flag
Remote frame transmit/receive
status flag
Automatic answering disable
mode select bit
Remote frame set bit
Receive request bit
Transmit request bit
Bit Name
Address
0230h - 023Fh
02B0h - 02BFh
When transmitting
0: Transmit operation
1: Transmit operation
When transmitting
0: Not transmitting
1: Transmitting
0: Overwrite not occurred
1: Overwrite occurred
Not in BasicCAN mode
In BasicCAN mode
0: Automatic answering to the remote frame
1: Automatic answering to the remote frame
0: Data frame transmitted/received
1: Remote frame transmitted/received
0: Receive operation not requested
1: Receive operation requested
0: Transmit operation not requested
1: Transmit operation requested
0: Data frame
1: Remote frame
0: Data frame received (status)
1: Remote frame received (status)
not completed
completed
enabled
disabled
(3)
(5)
(4)
(6)
(1)
Function
(5)
1: Storing receive data
When receiving
0: Receive operation
1: Receive operation
When receiving
0: Not storing receive
not completed
completed
data
(7)
(7)
After Reset
00h
00h
(5)
(2)
23. CAN Module
RW
RW
RW
RW
RW
RW
RW
RO
RO