M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 472

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 448 of 587
23.2
23.2.1
23.2.2
The CAN clock is an operating clock for the CAN module. f1 is selected as the CAN clock when the PM25 bit
in the PM2 register is set to 0. fCAN is selected as the CAN clock when the PM25 bit is set to 1. Set the PM25
bit while the SLEEP bit in CiSLPR register (i = 0, 1) is set to 0 (sleep mode).
Follow the procedure below before accessing the CAN-associated registers.
Do not enter wait mode or stop mode when the PM24 bit is set to 1.
NOTE:
1. The wait time to switch clock varies depending on the CPU clock frequency before and after the PM24 bit
CAN Clock and CPU Clock
(1) Set the PM24 bit to 0 (CPU clock is selected by the CM07 bit).
(2) Set the CM21 bit in the CM2 register to 0 (CPU clock is selected by the CM17 bit).
(3) Set bits MCD4 to MCD0 to 10010b (no division).
(4) Set the PM13 bit in the PM1 register to 1 (2 wait states).
(1) Set the PM24 bit to 1 (CPU clock is selected by the CM07 bit).
(2) Set the PM13 bit in the PM1 register to 1 (2 wait states).
(3) Wait for the time to switch clock.
When the PM25 bit is set to 0 (f1):
When the PM25 bit is set to 1 (fCAN):
High frequency: Higher frequency compared “before the PM24 bit changes” with “after the PM24 bit
changes”
Low frequency: Lower frequency compared “before the PM24 bit changes” with “after the PM24 bit
changes”
is changed.
CAN Clock
CPU Clock
Wait time to switch clock >
(1)
2 x High frequency
Low frequency
cycles
23. CAN Module

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