M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 471

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 447 of 587
Figure 23.36
23.1.23 CANi Acceptance Filter Support Register (CiAFS Register) (i = 0, 1)
CANi Acceptance Filter Support Register (i = 0,1)
b15
When the received ID is 6F3h
Data for a data table search is generated
from the received ID in standard format.
The table search with this data determines
whether or not the received ID is valid.
The CiAFS register enables prompt performance of a table search to determine the validity of the received ID.
This function is for standard-formatted ID only.
Read from the
CiAFS register
NOTE:
1. The value is obtained by setting the SLEEP bit in the CiSLPR register to 1 (sleep mode exited) after reset and supplying
Write to the
CiAFS register
b8
the clock to the CAN module.
b7
Write
Read
C0AFS and C1AFS Registers
b0
CSID7 CSID6 CSID5 CSID4 CSID3 CSID2
Bit search information
b15
b15
Data to determine the received ID is generated
b15
b15
0
0
Symbol
C0AFS
C1AFS
8 bits and 3 bits
01h
02h
04h
08h
10h
20h
40h
80h
Received ID
Divide it to
0
0
Bit search information
SID5
SID5
1
0
SID4 SID3 SID2 SID1 SID0
1
0
SID4
Address search information
08h
3-8 decoding
0
1
b7
0 0 0 0 0 0 0 1
0 0 0 0 0 0 1 0
0 0 0 0 0 1 0 0
0 0 0 1 0 0 0 0
0 0 1 0 0 0 0 0
0 1 0 0 0 0 0 0
1 0 0 0 0 0 0 0
0 0 0 0 1 0 0 0
SID10
SID3
0
1
0
Top + 00h
Top + 01h
Top + DEh
Top + FEh
Top + FFh
Function
SID2
1
6
1
0
D
b8
b8
0
b0
1
0
CSID1
SID1
007h
00Fh
6F7h
7F7h
7FFh
b7
0
1
0
0
0
b7
Address
0245h - 0244h
0255h - 0254h
b7
1
0
1
8 bits
CSID0
3 low-order bits of
SID0
b8
Address search information
7FEh
0
1
1
006h
00Eh
6F6h
7F6h
b6
received ID
0
0
0
0
0
D
F
0
1
0
SID10
0h
1h
2h
3h
4h
5h
6h
7h
b7
SID10 SID9 SID8 SID7 SID6
E
00Dh
7FDh
005h
6F5h
7F5h
b5
0
0
0
0
1
1
1
1
SID9
Bit search information
1
0
1
00Ch
7FCh
004h
6F4h
7F4h
b4
0
0
0
0
0
0
0
1
SID8
0000h to FFFFh
3
E
3 bits
7FBh
003h
00Bh
6F3h
7F3h
b3
1
1
3
1
0
0
1
0
0
SID10
SID7
SID0
b0
Setting Range
b0
1
1
0
00Ah
7FAh
002h
6F2h
7F2h
b2
0
0
0
0
0
SID9
SID6
Because the value of the 3
low-order bits is 3, b3 in the
left table is 1. (If the value
of the 3 low-order bits is 4,
b4 in the left table is 1.)
i = 0, 1
001h
009h
6F1h
7F1h
7F9h
After Reset
0100h
0100h
b1
1
0
0
0
0
SID8
SID5
000h
008h
6F0h
7F0h
7F8h
SID7
SID4
b0
0
0
0
1
0
23. CAN Module
(1)
SID6
SID3
RW
RW
b0
b0