M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 334

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 310 of 587
Figure 18.8
18.2.6
Table 18.12
18.2.7
OPA1 Bit
In external op-amp connection mode, multiple analog voltage can be amplified by one external op-amp using
extended analog input pins, ANEX0 and ANEX1.
When bits OPA1 and OPA0 are set to 11b (external op-amp connection), voltage applied to pins AN_0 to AN_7
are output from the ANEX0. Amplify this output signal by external op-amp and apply it to the ANEX1.
Analog voltage applied to ANEX1 is converted to a digital code and the A/D conversion result is stored into the
corresponding AD0i register (i = 0 to 7). The A/D conversion rate varies depending on the response
characteristics of the external op-amp. The ANEX0 pin cannot be connected to the ANEX1 pin directly.
Set bits APS1 and APS0 in the AD0CON2 register to 00b (AN_0 to AN_7, ANEX0, ANEX1).
Figure 18.8 shows a connection example of external op-amp connection mode.
When not using the A/D converter, the VCUT bit in the AD0CON1 register can disconnect the resistor ladder
of the A/D converter from the reference voltage input pin (VREF). As a result, power consumption can be
reduced by shutting off any current flow into the resistor ladder from the VREF pin.
When using the A/D converter, set the VCUT bit to 1 (VREF connected) prior to setting the ADST bit in the
AD0CON0 register to 1 (A/D conversion starts).
Do not set the VCUT bit to 0 (VREF not connected) during A/D conversion.
Even if the VCUT bit is set to 0, VREF remains connected to the D/A converter.
Analog input
AD0CON1 Register
0
0
1
1
External op-amp
External Operating Amplifier (Op-Amp) Connection Mode
Power Consumption Reduce Function
Extended Analog Input Pin Settings
Connection Example in External Op-Amp Connection Mode
OPA0 Bit
AN_0
AN_1
AN_2
AN_3
AN_4
AN_5
AN_6
AN_7
0
1
0
1
ANEX0
ANEX1
Not used
P9_5 as an analog input
Not used
Output to external op-amp
ANEX0 Function
Bits APS1 and APS0 in
the AD0CON2 register
Successive conversion register
00b
Resistor ladder
Not used
Not used
P9_6 as an analog input
Input from external op-amp
ANEX1 Function
Comparator
18. A/D Converter

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