M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 623

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
REVISION HISTORY
Date
363, 365
322-401
325-336
347-349
371-379
394-398
Page
352
362
368
374
375
376
381
387
401
402
405
406
411
415
417
−
Intelligent I/O
• [Term changed]
• [Modification throughout functions and modes]
• Text partially modified, order of register figures rearranged
• Figures 22.3 to 22.14 Bit name, description in Function field, and NOTE
• 22.2.1 Prescaler function and 22.2.2 Gate function Flow charts for
• Table 22.6 Registers PSL5 and PSL7, and NOTE added
• Table 22.11 Structure and title partially modified
• Tables 22.12 and 22.13 Inversed output functions deleted from Selectable
• 22.3.7 GiPOj Register reload timing select function added
• Figures 22.38 to 22.46 Bit name, description in Function field, and NOTE
• Figure 22.41 Bits SMODE and BSINT deleted from the GiEMR register,
• Figure 22.42 RBSF0 bit deleted
• Figure 22.43 BSERR bit deleted
• Table 22.16 NOTE partially modified, Table 22.17 PSL5 register and
• Table 22.19 PSL5 register and NOTE added,
• Figures 22.56 to 22.60 Bit name, description in Function field, and NOTE
• Table 22.27 PSL7 register and NOTE 3 added
• Section IEBus Mode deleted
CAN Module
• Table 23.1 Structure and text partially modified
• Table 23.2 NOTE 1 added
• Figure 23.3 NOTE partially modified
• Figure 23.6 Function description for bits TRMSUCC, RECSUCC and
• Figure 23.8 NOTE 1 added
• Figure 23.9 NOTE 1 added
Modulated span → Number of modulated pulses
Transmit buffer → GiTB register
Transmit register → Transmit shift register
Transfer format → Bit order
Transfer data format, character bit, transfer bit length → Data length
Bit rate → Baud rate
Transfer clock → Serial clock, baud rate, internal transmit clock, internal
During transmit data processing → When HDLC frame data is generated
During received data processing → When source data is generated
partially modified
register settings added
function fields
partially modified
bits SOF, ASTE, and TBSF0 deleted from the GiETC register
NOTE added
Table Clock Settings in UART Mode (Group 1) deleted
partially modified
STATE_RESET partially modified
Specification tables: Structure, text, NOTE, and formula: Partially modified
Block diagrams: Partially modified, figures for communication function is
Pin setting tables: Partially modified, column sequence rearranged
Register setting tables: Became flow chart
Operation timing diagrams: Partially modified
M32C/87 Group Hardware Manual
moved to communication function section.
receive clock
C - 12
Description
Summary