M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 304

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 280 of 587
Figure 17.46
Transmit/receive operation starts by writing data to the UiTB register.
Read the UiRB register when a receive operation is completed.
< When an internal clock is used>
k = 0, 1 when i = 5, k = 9, 10 when i = 6
NOTES:
1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15).
2. The UiRRM bit can be set to 1 (continuous receive mode enabled), only when the CKDIR bit in the UiMR register is set to 1
3. Set all the interrupt request flags to 0. If any of these flags remains 1, the IR bit in the IIOkIC register does not become 1
I flag = 0
IIOkIE register: UiTE bit = 0
U56IS register: UiCLK bit
UiMR register: bits SMD2 to SMD0 = 001b
UiC0 register: bits CLK1 and CLK0
UiBRG register = m
U56CON register: UiIRS bit
IIOkIR register = 00h
IIOkIE register: IRLT bit = 1
IIOkIE register: UiTE bit = 1
IIOkIC register: bits ILVL2 to ILVL0
I flag = 1
UiC1 register: TE bit = 1
(external clock) and RTS function is disabled.
when an interrupt request is generated. (An interrupt does not be occur.)
Pin settings in the Function Select Registers
Register Settings in Clock Synchronous Mode
CRS bit
CRD bit
bit 5 = 0
CKPOL bit
UFORM bit
RE bit = 1
CKDIR bit
bits 7 to 4 = 0000b
Start initial setting
UiRE bit = 0
UiRXD bit
UiCTS bit
UiRE bit = 1
IR bit = 0
End initial setting
UiRRM bit
bits 6 to 4 = 000b
(3)
Interrupt disabled
UARTi transmit interrupt disabled
UARTi receive interrupt disabled
CLKi input pin select bit
RXDi input pin select bit
CTSi input pin select bit
Clock synchronous mode
Clock select bit
UiBRG register count source select bits
CTS function select bit
CTS function disable bit
CLK polarity select bit
Bit order select bit
m = 00h to FFh
UARTi transmit interrupt source select bit
Continuous receive mode enable bit
UARTi receive interrupt not requested
Uses an interrupt request for interrupt
UARTi transmit interrupt enabled
UARTi receive interrupt enabled
Interrupt priority level select bit
Interrupt not requested
Interrupt enabled
Transmit operation enabled
Receive operation enabled
Baud rate =
17. Serial Interfaces (UART5 and UART6)
2(m + 1)
fj
(2)
Do not set these bits simultaneously.
Enable the interrupts after setting
the IRLT bit to 1.
fj: f1, f8, f2n
(1)