M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 120

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 96 of 587
9.5
Figure 9.13
9.5.1
The power consumption control is enabled by controlling a CPU clock frequency. The higher the CPU clock
frequency is, the more the processing power is available. The lower the CPU clock frequency is, the less power is
consumed. When unnecessary oscillation circuits are stopped, power consumption is further reduced.
CPU operating mode, wait mode, and stop mode are provided as the power consumption control. CPU operating
mode is further separated into the following modes; main clock mode, PLL mode, low-speed mode, low-power
consumption mode, on-chip oscillator mode, on-chip oscillator low-power consumption mode, and main clock
direct mode.
Figure 9.13 shows a mode transition diagram.
The CPU clock can be selected from the main clock, sub clock, on-chip oscillator clock, or PLL clock. When
switching the CPU clock source, wait until the new CPU clock source stabilizes. To change the CPU clock
source from the sub clock, on-chip oscillator clock, or PLL clock, set it to the main clock once and then switch
it to another clock.
To switch the CPU clock source from the on-chip oscillator clock to the main clock, set bits MCD4 to MCD0 in
the MCD register to 01000b (divided-by-8 mode) in on-chip oscillator mode.
Table 9.6 lists bit setting and operation mode associated with clocks.
CM10: bit in the CM1 register
NOTE:
Stop mode
1. Bits MCD4 to MCD0 in the MCD register become 01000b (divide-by-8 mode) after reset.
Power Consumption Control
Wait mode
CPU operating mode
Mode Transition
Interrupt
CM10 = 1
Main clock mode
Reset
WAIT instruction
Low-speed
(note 1)
Interrupt
consumption
Low-power
mode
mode
Sub clock
direct mode
Main clock
PLL mode
oscillator mode
On-chip
PLL clock
consumption mode
On-chip oscillator
9. Clock Generation Circuits
low-power
On-chip oscillator
clock