M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 73

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 49 of 587
5.2
5.3
5.4
Table 5.1
NOTES:
P0
P1
P2 to P4
P5_0
P5_1
P5_2
P5_3
P5_4
P5_5
P5_6
P5_7
P6 to P15
Pins, CPU, and SFRs are reset by the Vdet3 detection function, when the voltage applied to the VCC1 pin drops to
Vdet3 (V) or below. The states of the pins, CPU, and SFRs after reset are the same as the hardware reset 1. Refer to
6. Power Supply Voltage Detection Function for details on Vdet3 detection function.
When the PM03 bit in the PM0 register is set to 1 (MCU is reset), the MCU resets the CPU, SFRs, ports, and I/O
pins for peripheral functions. And then the MCU executes a program in an address indicated by the reset vector.
Set the PM03 bit to 1 while the main clock is selected as the clock source for the CPU clock and the main clock
oscillation is stable.
The software reset does not reset the following SFRs; bits PM01 and PM00 in the PM0 register, the WDC5 bit in
the WDC register, and the TCSPR register.
Processor mode remains unchanged since bits PM01 and PM00 are not reset.
When the CM06 bit in the CM0 register is set to 1 (reset) and the watchdog timer underflows, the MCU resets the
CPU, SFRs, ports, and I/O pins for peripheral functions. And then the MCU executes a program in an address
indicated by the reset vector.
The watchdog timer reset does not reset the following SFRs; bits PM01 and PM00 in the PM0 register, the WDC5
bit in the WDC register, and the TCSPR register.
Processor mode remains unchanged since bits PM01 and PM00 are not reset.
Pin Name
1. Ports P11 to P15 are provided in the 144-pin package only.
2. The availability of the pull-up resistors is undefined until the internal supply voltage stabilizes.
3. These pin states are defined after the power is turned on and the internal supply voltage stabilizes. Until then,
4. EPM (P5_5) must be “H” in the flash memory version.
the pin states are undefined.
Hardware Reset 2 (Vdet3 detection function)
Watchdog Timer Reset
Software Reset
(1)
Pin States while RESET Pin is Held “L”
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Input port (high-impedance)
Single-Chip Mode
CNVSS = “L”
Data input (high-impedance)
Data input (high-impedance)
Address output (undefined)
WR signal output (“H”)
BHE signal output (undefined)
RD signal output (“H”)
BCLK output
HLDA signal output (output level depends on an input level to
the HOLD pin)
HOLD signal input (high-impedance)
“H” signal output
RDY signal input (high-impedance)
Input port (high-impedance)
(2)
BYTE = “L”
(3)
(3)
(3)
Microprocessor Mode
(3)
(3)
CNVSS = “H”
Input port (high-impedance)
(4)
BYTE = “H”
5. Reset