M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 121

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 97 of 587
9.5.1.1
9.5.1.2
9.5.1.3
9.5.1.4
9.5.1.5
9.5.1.6
9.5.1.7
The main clock divided by 1 (no division), 2, 3, 4, 6, 8, 10, 12, 14, or 16 is used as the source for the CPU clock.
The main clock is also used as the source for fPFC. When the sub clock is running, fC32 can be used as the
count source for timer A and timer B.
The PLL clock divided by 1 (no division), 2, 3, 4, 6, 8, 10, 12, 14, or 16 is used as the source for the CPU clock.
The PLL clock is also used as the source for fPFC. When the sub clock is running, fC32 can be used as the
count source for timer A and timer B.
The sub clock is used as the source for the CPU clock. The main clock, PLL clock, or on-chip oscillator clock
can be selected as the source for fPFC by setting bits CM17 and CM21 after the CPU clock is switched to the
sub clock using the CM07 bit. In low-speed mode, fC32 can be used as the count source for timer A and timer
B.
Out of CPU operating modes, only main clock mode and low-power consumption mode can be entered from
low-speed mode. Enter main clock mode first prior to entering different CPU operating modes other than the
low-power consumption mode.
The MCU enters low-power consumption mode when the main clock stops in low-speed mode. The sub clock is
used as the source for the CPU clock. The on-chip oscillator clock can be selected as the source for fPFC by
setting the CM21 bit after entering low-power consumption mode. fC32 can be used as the count source for
timer A and timer B. When low-power consumption mode is entered, bits MCD4 to MCD0 in the MCD register
become 01000b (divide-by-8 mode). Therefore, when next time the CPU clock source is switched to the main
clock, the CPU clock is the main clock divided by eight. However, bits MCD4 to MCD0 do not become 01000b
if the main clock is stopped by setting the CM05 bit to 1 while the on-ship oscillator clock is selected as the
source for fPFC in low-speed mode. In this case, set bits MCD4 to MCD0 to 01000b by a program and then
switch the CPU clock source to the main clock.
The on-chip oscillator clock divided by 1 (no division), 2, 3, 4, 6, 8, 10, 12, 14, or 16 is used as the source for
the CPU clock. The on-chip oscillator clock is also used as the source for fPFC. When the sub clock is running,
fC32 can be used as the count source for timer A and timer B.
The MCU enters on-chip oscillator low-power consumption mode when the main clock stops in on-chip
oscillator mode. The on-chip oscillator clock divided by 1 (no division), 2, 3, 4, 6, 8, 10, 12, 14, or 16 is used as
the source for the CPU clock. The on-chip oscillator clock is also used as the source for fPFC. When the sub
clock is running, fC32 can be used as the count source for timer A and timer B.
The main clock is used as the source for the CPU clock in main clock direct mode. The PLL clock is used for
fPFC.
When fCAN is used to operate the CAN modules, enter main clock direct mode before accessing the CAN-
associated registers.
Main Clock Mode
PLL Mode
Low-Speed Mode
Low-Power Consumption Mode
On-Chip Oscillator Mode
On-Chip Oscillator Low-Power Consumption Mode
Main Clock Direct Mode
9. Clock Generation Circuits

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