M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 154

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 130 of 587
Figure 11.19
Interrupt Enable Register
Bit Symbols for the Interrupt Enable Register
b7 b6 b5 b4
Symbol
IIO10IE
IIO11IE
IIO0IE
IIO1IE
IIO2IE
IIO3IE
IIO4IE
IIO5IE
IIO6IE
IIO7IE
IIO8IE
IIO9IE
NOTES:
BTqE: Intelligent I/O group q base timer interrupt enabled
TM1jE: Intelligent I/O group 1 time measurement function j interrupt enabled
POqjE: Intelligent I/O group q waveform generation function j interrupt enabled
SIOkRE: Intelligent I/O group k receive interrupt enabled
SIOkTE: Intelligent I/O group k transmit interrupt enabled
GmTOE: Intelligent I/O group m HDLC data processing function interrupt enabled (TO: Transmit Output)
GmRIE: Intelligent I/O group m HDLC data processing function interrupt enabled (RI: Receive Input)
SRTmE: Intelligent I/O group m special communication function interrupt enabled
IEkE: Intelligent I/O group 2 IEBus communication function interrupt enabled
CAN0kE: CAN0 communication function interrupt enabled
CAN1kE: CAN1 communication function interrupt enabled
CAN1WUE: CAN1 wake-up interrupt enabled
INTnE: INTn interrupt enabled
UpTE: UARTp transmit interrupt enabled
UpRE: UARTp receive interrupt enabled
−: Reserved bit. Set to 0
1. See table below for bit symbols.
2. To use an interrupt request for interrupt, set the interrupt enabled bit r (r = 1 to 7) to 1 after setting the IRLT bit to 1.
b3
Address
00BAh
00BBh
00B0h
00B1h
00B2h
00B3h
00B4h
00B5h
00B6h
00B7h
00B8h
00B9h
b2
IO0IE to IIO11IE Registers
b1
b0
CAN10E
CAN11E
CAN12E
CAN00E
CAN01E
CAN02E
SRT0E
Bit Symbol
IE0E
IE1E
Bit 7
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
−
−
−
IRLT
Symbol
IIO0IE to IIO11E
CAN1WUE
SRT1E
INT6E
INT7E
INT8E
U5RE
U5TE
IE2E
Bit 6
Interrupt request select bit
Interrupt enabled bit 1
Interrupt enabled bit 2
Interrupt enabled bit 3
Interrupt enabled bit 4
Interrupt enabled bit 5
Interrupt enabled bit 6
Interrupt enabled bit 7
−
−
−
−
SIO0RE
SIO0TE
SIO1RE
SIO1TE
U6RE
U6TE
Bit Name
Bit 5
−
−
−
−
−
−
SIO2RE
SIO2TE
G0TOE
G1TOE
G0RIE
G1RIE
BT1E
BT2E
Bit 4
Address
See below
(2)
−
−
−
−
0: Uses an interrupt request for DMA, DMA II
1: Uses an interrupt request for interrupt
0: Disables an interrupt set by bit 1 in the IIOiIR register
1: Enables an interrupt set by bit 1 in the IIOiIR register
0: Disables an interrupt set by bit 2 in the IIOiIR register
1: Enables an interrupt set by bit 2 in the IIOiIR register
0: Disables an interrupt set by bit 3 in the IIOiIR register
1: Enables an interrupt set by bit 3 in the IIOiIR register
0: Disables an interrupt set by bit 4 in the IIOiIR register
1: Enables an interrupt set by bit 4 in the IIOiIR register
0: Disables an interrupt set by bit 5 in the IIOiIR register
1: Enables an interrupt set by bit 5 in the IIOiIR register
0: Disables an interrupt set by bit 6 in the IIOiIR register
1: Enables an interrupt set by bit 6 in the IIOiIR register
0: Disables an interrupt set by bit 7 in the IIOiIR register
1: Enables an interrupt set by bit 7 in the IIOiIR register
PO27E
Bit 3
−
−
−
−
−
−
−
−
−
−
−
TM13E/PO13E
TM14E/PO14E
TM12E/PO12E
TM10E/PO10E
TM17E/PO17E
PO21E
PO20E
PO22E
PO23E
PO24E
PO25E
PO26E
Bit 2
Function
TM11E/PO11E
TM15E/PO15E
TM16E/PO16E
Bit 1
i = 1 to 11
j = 0 to 7
k = 0 to 2
m = 0, 1
n = 6 to 8
p = 5, 6
q = 1, 2
−
−
−
−
−
−
−
−
−
After Reset
00h
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
IRLT
Bit 0
11. Interrupts
RW
RW
RW
RW
RW
RW
RW
RW
RW