M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 270

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 246 of 587
Table 17.10
NOTE:
i = 0 to 4
Interrupt source for
numbers 39 to 41
(See Figure 17.24)
Interrupt source for
numbers 17, 19, 33, 35,
37
(See Figure 17.24)
Interrupt source for
numbers 18, 20, 34, 36,
38
(See Figure 17.24)
Data transfer timing
from the UART receive
shift register to the UiRB
register
UARTi transmit output
delay
Functions of P6_3,
P6_7, P7_0, P9_2,
P9_6
Functions of P6_2,
P6_6, P7_1, P9_1,
P9_7
Noise filter width
(1)
(1)
1. Use the following procedures to change an interrupt source.
As shown in Table 17.10, I
(I
through a delay circuit, output signal from the SDAi pin changes after the SCLi pin level becomes low (“L”)
and the “L” output stabilizes.
(a) Disable an interrupt of the corresponding interrupt number.
(b) Change an interrupt source.
(c) Set the IR bit of a corresponding interrupt number to 0 (interrupt not requested).
(d) Set bits ILVL2 to ILVL0 of the corresponding interrupt number.
2
C mode) and the IICM bit in the UiSMR register to 1 (I
Function
Functions in I
(1)
Start condition or stop condition detection
(See Table 17.13 STSPSEL Bit Function)
No acknowledgement detection (NACKi) -
at the rising edge of 9th bit of SCLi
Acknowledgement detection (ACKi) -
at the rising edge of 9th bit of SCLi
At rising edge of 9th bit of SCLi
Delay
SDAi input and output
SCLi input and output
200 ns
(no clock delay)
CKPH = 0
2
2
C Mode (1/2)
C mode is entered when bits SMD2 to SMD0 in the UiMR register are set to 010b
(NACK/ACK interrupt)
IICM2 = 0
I
2
C Mode (SMD2 to SMD0 = 010b, IICM = 1)
(clock delay)
CKPH = 1
2
C mode). Because an SDAi transmit output passes
UARTi transmit
operation - at the
rising edge of 9th bit
of SCLi
UARTi receive operation - at the falling edge
of 9th bit of SCLi
Falling edge of 9th bit
of SCLi
(no clock delay)
17. Serial Interfaces (UART0 to UART4)
(UART transmit/receive interrupt)
CKPH = 0
IICM2 = 1
UARTi transmit
operation - at the
next falling edge after
the 9th bit of SCLi
Falling edge and
rising edge of 9th bit
of SCLi
(clock delay)
CKPH = 1