M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 237

IC M32C/87 MCU FLASH 144LQFP

M3087BFLBGP#U5

Manufacturer Part Number
M3087BFLBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLBGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 213 of 587
16.3
Figure 16.15
16.3.1
16.3.2
16.3.3
This function prevents the upper and lower arm short circuit caused by setting the upper and lower output
buffers in registers IDB0 and IDB1 to active simultaneously by program errors and so on.
To use this function, set the INV04 bit in the INVC0 register to 1 (simultaneous turn-on signal output disabled).
If any pair of output buffers (U and U, V and V, or W and W) are simultaneously set to active, the INV05 bit
becomes 1 (detected), and the INV03 bit becomes 0 (three-phase motor control timer output disabled). Then,
the port outputs are forcibly cutoff and the pins are placed in the high-impedance states. When this prevention
function is performed, set the registers associated with the three-phase motor control timer function again.
The dead time timer prevents arm short circuit caused by turn-off delay of external upper and lower transistors.
To enable the dead time timer, set the INV15 bit in the INVC1 register to 0 (dead time enabled). The count
source for dead time timer (fDT) can be selected using the INV12 bit, and the dead time can be set using the
DTT register.
The dead time is obtained from the following formulas.
Figure 16.15 shows an example of dead time timer operation.
When an “L” signal is input to the NMI pin, the INV03 bit in the INVC0 register becomes 0 (three-phase motor
control timer output disabled), the port outputs are forcibly cutoff, and then the pins are placed in the high-
impedance states. Also, the NMI interrupt occurs at the same time.
To enable the three-phase motor control timer function after the forced cutoff is performed, set the registers
associated with the three-phase motor control timer function again while an “H” signal is input to the NMI pin.
Forced-cutoff function by the
(three-phase motor control timer function used) and the INV03 bit is set to 1 (three-phase motor control timer
output enabled).
Short Circuit Prevention Features
Prevention Against Upper/Lower Arm Short Circuit by Program Errors
Arm Short Circuit Prevention Using Dead Time Timer
Forced-Cutoff Function by the NMI Input
Dead Time Timer Operation
U-phase output signal
U-phase output signal
f1
f1
1
2
× n (INV12 = 0)
× n (INV12 = 1)
U-phase turn-on
U-phase turn-on
Dead time timer
(internal signal)
(internal signal)
signal output
signal output
NMI
input can be used when the INV02 bit in the INVC0 register is set to 1
OFF
OFF
ON
ON
n: Value in the DTT register
Dead time
OFF
ON
OFF
ON
16. Three-Phase Motor Control Timer Function
OFF
OFF
Dead time
ON
ON

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