M3087BFLBGP#U5 Renesas Electronics America, M3087BFLBGP#U5 Datasheet - Page 125

• Manufacturer Part Number: M3087BFLBGP#U5
• Description: IC M32C/87 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLBGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 101 of 587
Table 9.8
9.5.3
NMI interrupt
Vdet4 detection interrupt
Serial interface interrupt
Key input interrupt
A/D conversion interrupt
Timer A interrupt
Timer B interrupt
INT interrupt
CAN interrupt
Intelligent I/O Interrupt
9.5.3.1
In stop mode, all clocks are stopped. Since the CPU clock and peripheral function clocks are stopped, the CPU
and the peripheral functions which are operated by these clocks stop their operation. The least power is required
to operate the MCU in stop mode. Enter stop mode from main clock mode.
Stop mode is entered by setting the CM10 bit in the CM1 register to 1 (all clocks stop) while the NMI pin is
held “H”. Also, bits MCD4 to MCD0 in the MCD register become 01000b (divide-by-8 mode) by setting the
CM10 bit to 1.
Figure 9.15 shows a procedure to enter stop mode.
When entering stop mode, the instructions following CM10 = 1 instruction are stored into the instruction queue,
and the program stops. When stop mode is exited, the instruction lined in the queue is executed before the exit
interrupt routine is handled.
Insert the jmp.b instruction as follows after the instruction to set the CM10 bit to 1.
Interrupt
LABEL_001:
Stop Mode
Interrupts to Exit Wait Mode and Usage Conditions
Entering Stop Mode
fset I
bset 0, cm1
jmp.b LABEL_001
nop
nop
nop
nop
mov.b #0, prcr
.
.
.
Available
Available
Available when the source clock is the
internal clock or external clock.
Available
Available in one-shot mode or single-
sweep mode
Available in all modes
Available
Available
Available
; I flag is set to 1
; all clocks stopped (stop mode)
; jmp.b instruction executed (no instruction between jmp.b and LABEL.)
; nop(1)
; nop(2)
; nop(3)
; nop(4)
; protection set
When CM02 = 0
Available
Available
Available when the source clock is the
external clock or f2n (when fXIND or on-
chip oscillator clock is selected).
Available
Not available
Available in event counter mode or when
the count source is fC32 or f2n (when
fXIND or on-chip oscillator clock is
selected)
Available
Available when fCAN is used
Not available
When CM02 = 1
9. Clock Generation Circuits